2025-04-07 06:00:42 [INFO] transceiver.py:157 Init transceiver 'BTS@172.18.77.20:5700'
2025-04-07 06:00:42 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.77.20:5802)
2025-04-07 06:00:42 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.77.20:5801)
2025-04-07 06:00:42 [INFO] transceiver.py:157 Init transceiver 'MS@172.18.77.22:6700'
2025-04-07 06:00:42 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.77.22:6802)
2025-04-07 06:00:42 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.77.22:6801)
2025-04-07 06:00:42 [INFO] transceiver.py:157 Init transceiver 'TRX1@172.18.77.20:5700/1'
2025-04-07 06:00:42 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.77.20:5804)
2025-04-07 06:00:42 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.77.20:5803)
2025-04-07 06:00:42 [INFO] transceiver.py:157 Init transceiver 'TRX2@172.18.77.20:5700/2'
2025-04-07 06:00:42 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.77.20:5806)
2025-04-07 06:00:42 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.77.20:5805)
2025-04-07 06:00:42 [INFO] transceiver.py:157 Init transceiver 'TRX3@172.18.77.20:5700/3'
2025-04-07 06:00:42 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.77.20:5808)
2025-04-07 06:00:42 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.77.20:5807)
2025-04-07 06:00:42 [INFO] fake_trx.py:426 Init complete
2025-04-07 06:00:42 [INFO] fake_trx.py:457 Setting real time process scheduler to SCHED_RR, priority 30
2025-04-07 06:00:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:00:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:00:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:00:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:00:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 0 -> 1
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:00:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:00:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 0 -> 1
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:00:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:00:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 0 -> 1
2025-04-07 06:00:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:00:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:00:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 0 -> 1
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:00:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:00:47 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:00:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:00:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:47 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:00:47 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:00:47 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:47 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:59 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:00:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:00:59 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:01:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:01:00 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:00 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:01:00 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2959 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:00 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2959 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:00 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2959 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:00 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:00 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:00 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:01:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:01:05 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:01:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:01:06 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:01:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:01:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:01:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:01:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:01:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:01:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:01:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:01:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:01:06 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:01:06 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:01:06 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
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2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:06 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:01:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:01:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:01:11 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:01:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:01:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:01:12 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:01:12 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:01:12 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:12 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:01:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:01:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:01:17 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:01:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:01:17 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:01:17 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:01:17 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:01:17 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:01:17 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:01:17 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:01:17 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:01:17 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:01:17 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:01:17 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:01:17 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:17 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:17 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:01:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:01:22 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:01:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:01:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:01:23 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:01:23 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:23 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:23 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:01:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:01:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:01:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:01:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:01:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:01:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:01:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:01:28 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:01:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:01:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:01:29 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:01:29 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:29 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:01:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:01:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:01:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:01:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:01:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:38 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:01:38 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:01:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:01:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:01:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:01:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:01:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:01:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:01:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:01:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:02:00 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:00 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:01 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:01 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:02:02 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:02:02 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-07 06:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-07 06:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-07 06:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-07 06:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-07 06:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-07 06:02:06 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-07 06:02:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:06 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-07 06:02:07 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-07 06:02:07 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-07 06:02:08 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-07 06:02:08 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-07 06:02:09 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-07 06:02:09 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-07 06:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-07 06:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-07 06:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-07 06:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-07 06:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-07 06:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-07 06:02:13 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-07 06:02:13 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-07 06:02:14 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-07 06:02:14 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:15 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-07 06:02:15 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-07 06:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:16 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-07 06:02:16 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-07 06:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-07 06:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-07 06:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-07 06:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-07 06:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-07 06:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-07 06:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-07 06:02:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-07 06:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-07 06:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-07 06:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-07 06:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-07 06:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-07 06:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-07 06:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-07 06:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-07 06:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-07 06:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-07 06:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-07 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-07 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-07 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-07 06:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-07 06:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-07 06:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-07 06:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-07 06:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-07 06:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-04-07 06:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-04-07 06:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-04-07 06:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-04-07 06:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-04-07 06:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-04-07 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-04-07 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-04-07 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-04-07 06:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-04-07 06:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-04-07 06:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-04-07 06:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-04-07 06:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-04-07 06:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-04-07 06:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-04-07 06:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-04-07 06:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-04-07 06:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-04-07 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-04-07 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-04-07 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-04-07 06:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-04-07 06:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-04-07 06:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-04-07 06:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-04-07 06:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-04-07 06:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-04-07 06:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-04-07 06:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-04-07 06:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-04-07 06:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-04-07 06:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-04-07 06:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-04-07 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-04-07 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-04-07 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-04-07 06:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-04-07 06:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-04-07 06:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-04-07 06:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-04-07 06:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:02:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-04-07 06:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-04-07 06:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-04-07 06:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-04-07 06:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-04-07 06:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-04-07 06:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-04-07 06:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-04-07 06:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:02:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:02:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:02:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:02:58 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:02:58 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:02:58 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:02:58 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:02:58 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:02:58 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:02:58 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:03:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:03:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:03:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:03:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:03:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:03:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:03:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:03:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:03:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:03:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:03:03 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:03:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:03:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:03:03 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:03:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:03:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:03:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:03:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:03:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:03:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:03:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:03:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:03:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:03:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:03:08 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:03:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:03:09 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:03:09 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:03:09 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:10 [WARNING] transceiver.py:287 (MS@172.18.77.22:6700) RX TRXD message (fn=409 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:03:10 [WARNING] transceiver.py:287 (MS@172.18.77.22:6700) RX TRXD message (fn=409 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:18 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:03:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:03:18 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:03:18 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2144 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:03:18 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:03:18 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:03:18 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:03:18 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:03:18 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:03:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:03:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:03:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:03:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:03:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:03:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:03:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:03:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:03:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:03:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:03:23 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:03:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:03:24 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:03:24 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:24 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:03:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:03:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:03:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:03:52 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:03:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:03:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:03:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:03:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:03:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:03:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:03:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:03:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:03:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:03:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:03:57 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:03:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:03:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:03:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:03:58 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:03:58 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:03:58 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:03:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:03:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:03:58 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:03:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:03:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:03:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:03:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:03:59 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:03:59 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:04:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:04:00 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:04:00 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:04:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:04:12 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:04:12 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:04:13 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:04:13 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:04:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:04:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-07 06:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-07 06:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-07 06:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-07 06:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-07 06:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-07 06:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-07 06:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-07 06:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-07 06:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-07 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-07 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-07 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-07 06:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-07 06:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-07 06:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-07 06:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-07 06:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-07 06:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-07 06:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-07 06:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-07 06:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-07 06:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-07 06:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-07 06:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-07 06:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-07 06:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-07 06:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-07 06:04:47 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-07 06:04:47 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-07 06:04:48 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-07 06:04:48 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-07 06:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-07 06:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-07 06:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-07 06:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-07 06:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-07 06:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-07 06:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-07 06:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-07 06:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-07 06:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-07 06:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-07 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-07 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-07 06:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-07 06:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-07 06:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-07 06:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-07 06:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:04:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:04:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-07 06:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-07 06:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-07 06:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-07 06:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-04-07 06:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-04-07 06:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-04-07 06:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-04-07 06:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-04-07 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-04-07 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-04-07 06:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-04-07 06:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-04-07 06:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-04-07 06:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-04-07 06:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-04-07 06:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-04-07 06:05:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-04-07 06:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-04-07 06:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-04-07 06:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-04-07 06:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-04-07 06:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-04-07 06:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-04-07 06:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-04-07 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-04-07 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-04-07 06:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-04-07 06:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-04-07 06:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-04-07 06:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-04-07 06:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-04-07 06:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-04-07 06:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-04-07 06:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-04-07 06:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-04-07 06:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-04-07 06:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-04-07 06:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-04-07 06:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-04-07 06:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-04-07 06:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-04-07 06:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-04-07 06:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-04-07 06:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-04-07 06:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-04-07 06:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-04-07 06:05:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:05:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:05:23 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:05:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=18566 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:05:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=18566 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:05:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=18566 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:05:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=18566 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:05:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=18566 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:05:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=18566 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:05:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:05:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:05:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:05:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:05:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:05:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:05:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:05:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:05:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:05:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:05:28 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:05:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:05:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:05:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:05:28 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:05:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:05:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:05:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:05:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:05:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:05:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:05:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:05:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:05:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:05:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:05:33 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:05:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:05:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:05:34 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:34 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:05:34 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:05:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:05:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:05:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:05:41 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:05:41 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:05:42 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:42 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:43 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:05:43 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:05:44 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:05:44 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:05:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:05:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:05:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:05:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:05:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:05:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:05:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:05:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:06:03 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:06:03 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:06:04 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:06:04 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:06:05 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:05 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-07 06:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-07 06:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-07 06:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-07 06:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-07 06:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-07 06:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-07 06:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-07 06:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-07 06:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-07 06:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-07 06:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-07 06:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-07 06:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-07 06:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-07 06:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-07 06:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-07 06:06:17 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-07 06:06:17 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-07 06:06:17 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-07 06:06:18 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-07 06:06:18 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-07 06:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-07 06:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-07 06:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-07 06:06:21 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-07 06:06:21 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-07 06:06:22 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-07 06:06:22 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-07 06:06:23 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-07 06:06:23 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-07 06:06:24 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-07 06:06:24 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:25 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-07 06:06:25 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-07 06:06:25 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-07 06:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-07 06:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-07 06:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-07 06:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-07 06:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-07 06:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-07 06:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-07 06:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-07 06:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-07 06:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-07 06:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-07 06:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-07 06:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-07 06:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-07 06:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-07 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-07 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-07 06:06:35 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-07 06:06:35 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-07 06:06:36 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-04-07 06:06:36 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-04-07 06:06:37 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-04-07 06:06:37 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:38 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-04-07 06:06:38 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-04-07 06:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-04-07 06:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-04-07 06:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-04-07 06:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-04-07 06:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-04-07 06:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-04-07 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-04-07 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-04-07 06:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-04-07 06:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-04-07 06:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-04-07 06:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-04-07 06:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-04-07 06:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-04-07 06:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-04-07 06:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-04-07 06:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-04-07 06:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-04-07 06:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-04-07 06:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-04-07 06:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-04-07 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-04-07 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-04-07 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-04-07 06:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-04-07 06:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-04-07 06:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-04-07 06:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-04-07 06:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-04-07 06:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-04-07 06:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-04-07 06:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-04-07 06:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-04-07 06:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-04-07 06:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-04-07 06:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-04-07 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-04-07 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-04-07 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-04-07 06:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:06:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:06:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-04-07 06:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-04-07 06:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-04-07 06:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-04-07 06:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-04-07 06:07:02 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-04-07 06:07:02 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-04-07 06:07:03 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-04-07 06:07:03 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:07:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:07:03 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:07:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19521 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:07:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:07:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19521 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19521 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19521 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19521 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=19521 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:07:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:07:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:07:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:07:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:07:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:07:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:07:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:07:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:07:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:07:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:07:08 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:07:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:07:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:07:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:07:08 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:07:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:07:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:07:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:07:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:07:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:07:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:07:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:07:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:07:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:07:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:07:13 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:07:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:13 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:07:14 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:14 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:07:14 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:07:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:07:38 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:07:38 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:07:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:07:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:07:38 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:07:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:07:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:07:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:07:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:07:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:07:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:07:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:07:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:07:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:07:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:07:43 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:07:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:07:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:07:44 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:07:44 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:07:44 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:07:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:07:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:07:58 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:07:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:58 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:07:59 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:07:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:07:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:07:59 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:08:05 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:08:05 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:08:06 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:06 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:06 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:08:07 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:08:07 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:08:08 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:08:08 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:08:09 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:08:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:09 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:08:12 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:08:12 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:08:13 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:08:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:08:13 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:08:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:08:13 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:08:13 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:08:13 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:08:13 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:08:13 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:08:13 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:08:13 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:08:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:08:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:08:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:08:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:08:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:08:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:08:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:08:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:08:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:08:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:08:18 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:08:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:08:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:08:19 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:08:19 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:08:19 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:08:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:08:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:08:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:08:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:08:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:08:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:08:32 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:08:32 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:08:33 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:08:33 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:35 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:08:35 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:08:36 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:08:36 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4257 tn=0 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4257 tn=1 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4257 tn=2 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4257 tn=3 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4257 tn=4 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4257 tn=5 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4257 tn=6 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4257 tn=7 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4258 tn=0 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4258 tn=1 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4258 tn=2 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4258 tn=3 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4258 tn=4 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4258 tn=5 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4258 tn=6 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4258 tn=7 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4259 tn=0 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4259 tn=1 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4259 tn=2 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4259 tn=3 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4259 tn=4 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4259 tn=5 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4259 tn=6 bl=148 pwr=0
2025-04-07 06:08:38 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=4260): ver=1 fn=4259 tn=7 bl=148 pwr=0
2025-04-07 06:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:08:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:08:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-07 06:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-07 06:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-07 06:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-07 06:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-07 06:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-07 06:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-07 06:08:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:58 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:08:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:08:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:08:58 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-07 06:08:58 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-07 06:08:59 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-07 06:08:59 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-07 06:09:00 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-07 06:09:00 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-07 06:09:01 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:09:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:09:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:01 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-07 06:09:02 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-07 06:09:02 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-07 06:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-07 06:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-07 06:09:04 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-07 06:09:04 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-07 06:09:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:09:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:09:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:05 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-07 06:09:05 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:09:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:09:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:09:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:09:05 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10291 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:09:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:09:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:09:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:09:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:09:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:09:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:09:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:09:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:09:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:09:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:09:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:09:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:09:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:09:11 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:09:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:09:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:09:11 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:09:11 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:09:11 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:09:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:09:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:09:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:09:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:09:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:09:25 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:09:25 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:09:26 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:09:26 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:09:28 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:09:28 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:09:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:09:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:09:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:09:35 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:09:35 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:35 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:35 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:35 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:35 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:35 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:09:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:09:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:09:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:09:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:09:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:09:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:09:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:09:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:09:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:09:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:09:40 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:09:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:09:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:09:40 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:09:40 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:09:40 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:09:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:09:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:09:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:44 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:09:44 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:09:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:09:45 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:09:45 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:09:46 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:09:46 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:09:47 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:09:47 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:09:48 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:09:48 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:09:56 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:09:56 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:09:57 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:09:57 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:09:57 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:09:58 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:09:58 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:09:59 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:09:59 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:10:00 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:10:00 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:10:01 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:10:01 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:10:02 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:10:02 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:10:03 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:10:03 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:10:04 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:04 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:10:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:10:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:10:09 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:10:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:10:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:10:09 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:10:09 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:09 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:10:09 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:10:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:10:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:10:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:10:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:10:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:10:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:10:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:10:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:10:15 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:10:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:10:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:10:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:22 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2888 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2888 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2888 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2888 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2888 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2888 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2889 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2889 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2889 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2889 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2889 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2889 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2889 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2889 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:10:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:10:27 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:10:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:10:28 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:28 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:28 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:10:29 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:10:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:29 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:10:30 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:10:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:10:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:10:32 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:32 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:32 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:10:33 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:10:33 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:10:33 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:34 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:10:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:10:35 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:10:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:10:35 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:37 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:10:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2218 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2218 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2218 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:10:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:10:42 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:10:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:10:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:10:43 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:43 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:43 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:46 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:46 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:10:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:10:51 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:10:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:10:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:10:51 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:10:51 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:10:51 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:10:51 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:10:51 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:10:51 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:10:51 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:10:51 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:10:51 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:10:51 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:51 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:10:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD HANDOVER
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:10:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:10:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=576 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=576 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=576 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=576 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=576 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=576 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=577 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=577 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=577 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=577 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=577 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=577 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=577 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=577 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:10:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:10:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:10:54 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:10:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:10:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:10:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:10:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:10:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:10:59 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:10:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:10:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:10:59 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:10:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:11:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:11:04 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:11:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:11:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:11:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:11:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:11:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:11:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:11:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:11:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:11:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:11:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:11:04 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:11:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:11:04 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:11:04 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:11:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:11:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:10 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:10 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1306 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:10 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:10 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:10 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:10 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:10 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:10 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:10 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:11:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:11:15 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:11:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:11:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:11:15 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:11:15 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:11:15 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:11:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:11:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:11:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:19 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:11:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:20 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:20 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1203 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1203 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1203 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1203 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1203 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1204 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1204 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1204 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1204 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1204 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1204 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1204 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1204 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:11:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:11:25 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:11:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:25 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:11:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:11:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:11:30 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:11:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:11:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:11:31 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:11:31 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:11:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:11:31 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:11:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:11:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:11:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:11:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:11:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:11:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:11:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:11:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:11:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:11:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:11:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:11:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:33 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:11:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:11:34 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:11:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:11:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:35 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:11:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:46 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:11:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:11:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:11:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:11:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:11:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:11:51 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:11:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:11:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:11:51 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:11:51 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:11:51 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:11:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:11:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:11:51 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:11:51 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:11:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:11:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:11:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:11:53 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:54 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:11:54 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:11:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:55 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:11:55 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:56 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:11:56 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:11:57 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:11:57 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:11:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:11:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:11:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:11:59 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:11:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:11:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:12:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:12:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:12:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:12:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:12:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:12:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:12:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:12:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:12:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:12:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:12:04 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:12:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:12:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:12:05 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:12:05 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:05 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:05 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:12:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:12:05 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:05 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:12:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:12:06 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:12:06 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=317 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:12:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:12:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:12:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:12:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:12:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:12:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:12:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:12:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:12:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:12:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:12:11 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:12:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:12:11 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:11 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:11 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:12:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:12:11 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:11 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:12:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:12:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:16 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:12:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:12:17 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:12:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:12:18 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:12:18 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:12:19 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:12:19 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:12:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:12:19 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:19 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:20 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:12:20 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3157): ver=1 fn=3156 tn=0 bl=148 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3157): ver=1 fn=3156 tn=1 bl=148 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3157): ver=1 fn=3156 tn=2 bl=148 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3157): ver=1 fn=3156 tn=3 bl=148 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3157): ver=1 fn=3156 tn=4 bl=148 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3157): ver=1 fn=3156 tn=5 bl=148 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3157): ver=1 fn=3156 tn=6 bl=148 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3157): ver=1 fn=3156 tn=7 bl=148 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3155 tn=5 bl=148 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3155 tn=6 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3155 tn=7 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3156 tn=0 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3156 tn=1 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3156 tn=2 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3156 tn=3 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3156 tn=4 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3156 tn=5 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3156 tn=6 pwr=0
2025-04-07 06:12:25 [WARNING] transceiver.py:330 (MS@172.18.77.22:6700) Stale TRXD message (fn=3157): fn=3156 tn=7 pwr=0
2025-04-07 06:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:12:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:12:25 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:12:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3178 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3178 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3178 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3178 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3178 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3178 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:12:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:12:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:12:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:12:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:12:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:12:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:12:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:12:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:12:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:12:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:12:30 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:12:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:12:31 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:31 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:31 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:12:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:12:31 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:31 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:12:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:12:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:12:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:12:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:12:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:12:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:12:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:12:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:12:39 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:12:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:12:39 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:39 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:39 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:12:40 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:12:40 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:12:41 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:12:41 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:12:42 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:12:42 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:12:43 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:12:43 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:12:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:12:47 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3607 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3607 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3607 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:12:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:12:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:12:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:12:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:12:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:12:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:12:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:12:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:12:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:12:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:12:52 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:12:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:12:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:12:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:12:53 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:53 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:53 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:12:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:12:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:12:53 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:12:53 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:12:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:53 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:12:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:12:55 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:55 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:12:56 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:12:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:56 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:12:57 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:12:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:12:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:12:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:12:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:12:57 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:12:58 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:12:58 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:12:59 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:12:59 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:13:00 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:13:00 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:13:00 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:13:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:13:01 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:13:01 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:01 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:13:01 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:13:02 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:13:02 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:13:03 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:13:03 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3174 tn=0 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3174 tn=1 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3174 tn=2 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3174 tn=3 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3174 tn=4 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3174 tn=5 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3174 tn=6 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3174 tn=7 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3175 tn=0 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3175 tn=1 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3175 tn=2 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3175 tn=3 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3175 tn=4 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3175 tn=5 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3175 tn=6 bl=148 pwr=0
2025-04-07 06:13:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=3176): ver=1 fn=3175 tn=7 bl=148 pwr=0
2025-04-07 06:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:13:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:13:07 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:13:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:13:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:13:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:13:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:13:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:13:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:13:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:13:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:13:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:13:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:13:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:13:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:13:12 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:13:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:13:13 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:13:13 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:13 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:13:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:13:13 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:13:13 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:13:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:13:17 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:13:18 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:13:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:13:19 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:13:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:13:20 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:13:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:13:21 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:13:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:13:21 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:13:21 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:21 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:13:22 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:13:22 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:13:23 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:13:23 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:13:23 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:13:24 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:13:24 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:13:25 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:13:25 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:13:26 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:13:26 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:13:27 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:13:27 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:13:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:13:29 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:13:29 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:13:30 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:13:30 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:13:31 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:13:31 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:13:31 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:13:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:13:37 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:13:37 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:13:43 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:13:43 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:13:44 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:13:44 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:13:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:13:45 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:13:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:13:45 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7097 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:13:45 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7097 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:13:45 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7097 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:13:45 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7097 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:13:45 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7097 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:13:45 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7097 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:13:45 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7097 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:13:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:13:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:13:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:13:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:13:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:13:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:13:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:13:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:13:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:13:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:13:50 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:13:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:13:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:13:50 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:13:50 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:13:50 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:13:50 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:13:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:13:51 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:13:51 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:13:52 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:52 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:13:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:13:54 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:54 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:13:55 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:13:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:13:55 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:13:56 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:13:56 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:13:57 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:13:58 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:13:58 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:13:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:13:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:13:59 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:13:59 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:14:06 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:14:06 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:14:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:14:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:14:07 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3608 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3609 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3609 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3609 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3609 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3609 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3609 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3609 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3609 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3610 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3610 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3610 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3610 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3610 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3610 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3610 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:07 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3610 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:14:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:14:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:14:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:14:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:14:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:14:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:14:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:14:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:14:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:14:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:14:12 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:14:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:14:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:14:12 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:14:12 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:14:12 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:14:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:14:12 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:14:12 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:14:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:14:14 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:14:15 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:14:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:14:20 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:14:20 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:14:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:14:28 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:14:28 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:14:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:14:36 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:14:36 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:14:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:14:44 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:14:44 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7106 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:44 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7106 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:44 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7106 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:44 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7106 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:44 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7106 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:44 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7106 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:44 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7106 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:44 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7106 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:14:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:14:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:14:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:14:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:14:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:14:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:14:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:14:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:14:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:14:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:14:49 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:14:49 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:14:50 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:14:50 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:50 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:14:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:14:50 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:14:50 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:54 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:14:54 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:14:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:14:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:14:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:14:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:14:55 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:14:55 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:14:57 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:14:57 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:14:58 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:14:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:14:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:14:58 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:14:58 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:14:58 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:14:59 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:14:59 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:15:00 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:15:00 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:15:01 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:15:01 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:15:02 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:15:02 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:15:03 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:15:03 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:15:05 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:15:05 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:15:06 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:15:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:15:06 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:15:06 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:06 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:15:07 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:15:07 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:15:08 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:15:08 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:15:11 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:15:11 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:15:12 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:15:12 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:15:14 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:15:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:15:14 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:15:14 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:14 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:15:15 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:15:15 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:15:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:15:22 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:15:22 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-07 06:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-07 06:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-07 06:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-07 06:15:26 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-07 06:15:26 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-07 06:15:27 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-07 06:15:27 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-07 06:15:28 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-07 06:15:28 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-07 06:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-07 06:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-07 06:15:29 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-07 06:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:15:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:15:30 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:15:30 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-07 06:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-07 06:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-07 06:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-07 06:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-07 06:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-07 06:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-07 06:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-07 06:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-07 06:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-07 06:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-07 06:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-07 06:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-07 06:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-07 06:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-07 06:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-07 06:15:38 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:15:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:15:38 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:15:38 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:38 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-07 06:15:39 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-07 06:15:39 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-07 06:15:40 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-07 06:15:40 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-07 06:15:41 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-07 06:15:41 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-07 06:15:42 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-07 06:15:42 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-07 06:15:43 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-07 06:15:43 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-07 06:15:44 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-07 06:15:44 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-07 06:15:45 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-07 06:15:45 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-07 06:15:45 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-07 06:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:15:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:15:46 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:15:46 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-07 06:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-07 06:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-07 06:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-07 06:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-07 06:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-07 06:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-07 06:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-07 06:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-07 06:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-07 06:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-07 06:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-07 06:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-04-07 06:15:53 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-04-07 06:15:53 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-04-07 06:15:53 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-04-07 06:15:54 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:15:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:15:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:15:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:15:54 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:15:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:15:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:15:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:15:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:15:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:15:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:15:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:15:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:15:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:15:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:15:59 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:15:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:15:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:15:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:15:59 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:16:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:16:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:16:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:16:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:16:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:16:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:16:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:16:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:16:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:16:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:16:04 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:16:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:16:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:16:05 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:16:05 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:16:05 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:16:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:16:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:16:05 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:16:05 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:16:06 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:16:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:07 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:16:07 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:16:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:08 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:16:08 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:16:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:09 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:16:09 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:16:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:16:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:16:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:16:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:16:13 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:16:13 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:16:17 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:16:17 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:16:19 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:16:19 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:16:20 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:16:20 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:16:21 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:16:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:16:21 [WARNING] transceiver.py:287 (MS@172.18.77.22:6700) RX TRXD message (fn=3605 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:16:21 [WARNING] transceiver.py:287 (MS@172.18.77.22:6700) RX TRXD message (fn=3605 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:16:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:16:21 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:16:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:16:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:16:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:16:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:16:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:16:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:16:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:16:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:16:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:16:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:16:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:16:26 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:16:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:26 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:16:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:16:27 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:16:27 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:16:27 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:16:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:16:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:27 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:16:28 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:16:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:28 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:16:29 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:29 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:16:30 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:30 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:16:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:16:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:16:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:16:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:16:33 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:16:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:16:34 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:16:34 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:16:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:16:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:16:35 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:16:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:16:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:16:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:16:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:16:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:16:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:16:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:16:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:16:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:16:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:16:40 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:16:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:16:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:16:40 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:16:40 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:16:40 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:16:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:16:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:16:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:41 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:16:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:42 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:16:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:16:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:43 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:16:43 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:44 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:16:44 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:16:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:45 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:16:45 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:16:46 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:16:46 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:16:47 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:16:47 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:16:48 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:16:48 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:16:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:16:48 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:16:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1851 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1851 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:16:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:16:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:16:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:16:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:16:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:16:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:16:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:16:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:16:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:16:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:16:53 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:16:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:16:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:16:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:16:54 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:16:54 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:16:54 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:16:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:16:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:16:55 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:56 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:16:56 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:56 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:16:58 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:16:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:16:58 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:16:59 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:16:59 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:17:00 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:17:00 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:17:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:00 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:17:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:17:05 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:17:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:17:06 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:17:06 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:17:06 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:17:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:17:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:17:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:17:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:17:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:10 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:17:10 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:17:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:11 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:17:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:11 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:17:12 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:17:12 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:17:12 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:17:13 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:17:13 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:17:15 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:17:15 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:17:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:17:16 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:17:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:17:16 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:17:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:16 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:17:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:17:21 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:17:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:17:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:17:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:17:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:17:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:17:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:17:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:17:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:17:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:17:21 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:17:21 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:17:21 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:17:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:17:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:17:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:17:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:17:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:17:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:24 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:17:24 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:17:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:25 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:17:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:17:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:26 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:17:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:17:27 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:17:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:27 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:17:28 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:17:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:28 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:17:29 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:17:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:29 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:17:30 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:17:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:30 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:17:31 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:17:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:31 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:17:32 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:17:32 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:17:32 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:17:33 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:17:33 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:17:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:17:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:17:36 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:17:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:36 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:17:37 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:17:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:37 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:17:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:39 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:17:39 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:17:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:40 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:17:40 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:17:40 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:17:41 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:17:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:41 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:17:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4452 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4452 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4452 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4452 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4452 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4452 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:17:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:17:46 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:17:46 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:46 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:17:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:17:47 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:17:47 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:17:47 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:17:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:17:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:17:47 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:17:47 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD NOHANDOVER
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=117 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=118 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=119 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=120 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=121 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=122 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=123 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=124 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=125 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=127 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=128 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD NOHANDOVER
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:17:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:48 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:17:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=302 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:48 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:17:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:17:53 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:17:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:17:53 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:17:53 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:17:53 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:17:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:17:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:17:53 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:17:53 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD NOHANDOVER
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=117 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=118 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=119 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=120 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=121 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=122 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=123 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=124 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=125 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=127 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=128 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:53 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD NOHANDOVER
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:17:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:54 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:17:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:54 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:17:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:17:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:17:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:17:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:17:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:17:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:17:59 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:17:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:18:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:18:00 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:18:00 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:18:00 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:18:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:18:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:18:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:18:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:18:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:18:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:18:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:18:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:18:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:18:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:18:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:18:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:18:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:18:06 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:18:06 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:18:07 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:18:07 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:18:08 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:18:08 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:18:08 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:18:09 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:18:09 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:18:10 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:18:10 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:18:11 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:18:11 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:18:12 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:18:12 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:18:13 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:18:13 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:18:14 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:18:14 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:18:15 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:18:15 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:18:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:18:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:18:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:16 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:18:16 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:18:16 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:18:17 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:18:17 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:18:18 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:18:18 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:18:21 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:18:21 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:18:22 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:18:22 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:18:23 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:18:23 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:18:24 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:18:24 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:18:24 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:18:25 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:18:25 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:18:26 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -4300us; resetting the clock
2025-04-07 06:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:18:27 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:18:27 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:18:28 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:18:28 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:18:29 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:18:29 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:18:30 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:18:30 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:18:31 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:18:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:18:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:18:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:31 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-07 06:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-07 06:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-07 06:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-07 06:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-07 06:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-07 06:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-07 06:18:37 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-07 06:18:37 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-07 06:18:38 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-07 06:18:38 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-07 06:18:39 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-07 06:18:39 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-07 06:18:40 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-07 06:18:40 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-07 06:18:40 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-07 06:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-07 06:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-07 06:18:42 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-07 06:18:42 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-07 06:18:43 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-07 06:18:43 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-07 06:18:44 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-07 06:18:44 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-07 06:18:45 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-07 06:18:45 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-07 06:18:46 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-07 06:18:46 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:18:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:18:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:18:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:18:47 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-07 06:18:47 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-07 06:18:48 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-07 06:18:48 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-07 06:18:48 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-07 06:18:49 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-07 06:18:49 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-07 06:18:50 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-07 06:18:50 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-07 06:18:51 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-07 06:18:51 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-07 06:18:52 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-07 06:18:52 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-07 06:18:53 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-07 06:18:53 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-07 06:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-07 06:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-07 06:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-07 06:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-07 06:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-07 06:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-07 06:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-07 06:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-07 06:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-07 06:18:58 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-07 06:18:58 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-07 06:18:59 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-07 06:18:59 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-07 06:19:00 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-07 06:19:00 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-07 06:19:01 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-07 06:19:01 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:19:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (MS@172.18.77.22:6700) RX TRXD message (fn=13562 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:19:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:19:02 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=13564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:19:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:19:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:19:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:19:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:19:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:19:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:19:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:19:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:19:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:19:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:19:07 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:19:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:19:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:19:07 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:19:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:19:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:19:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:19:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:19:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:19:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:19:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:19:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:19:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:19:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:19:12 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:19:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:19:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:19:12 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:19:12 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:19:12 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:19:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:19:12 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:19:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:19:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:19:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:19:22 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:19:22 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:19:23 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:19:23 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:19:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:19:23 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2484 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:23 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:19:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:19:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:19:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:19:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:19:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:19:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:19:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:19:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:19:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:19:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:19:28 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:19:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:19:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:19:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:19:29 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:19:29 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:19:29 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:19:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:19:29 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:19:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:19:37 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:19:37 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:19:38 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:19:38 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:19:39 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:19:39 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:19:39 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:19:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:19:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:19:40 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:19:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:19:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:19:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:19:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:19:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:19:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:19:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:19:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:19:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:19:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:19:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:19:45 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:19:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:19:45 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:19:45 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:19:45 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:19:45 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:19:45 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:19:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:19:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:19:47 [DEBUG] fake_trx.py:264 (MS@172.18.77.22:6700) Recv SETTA cmd
2025-04-07 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:19:47 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:19:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:19:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:19:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:19:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:19:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:19:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:19:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:19:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:19:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:19:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:19:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:19:53 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:19:54 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:19:54 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:19:55 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:19:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:19:56 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:19:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:19:56 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:19:57 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:19:58 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:19:58 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:19:59 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:19:59 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:20:00 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:20:00 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:20:01 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:20:01 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:20:02 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:20:02 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:20:03 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:20:03 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:20:04 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:20:04 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:20:04 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:20:05 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:20:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:20:05 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:20:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:20:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:20:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:20:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:20:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:20:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:20:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:20:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:20:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:20:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:20:10 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:20:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:20:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:20:11 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:20:11 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:20:11 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:20:11 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:20:11 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:20:11 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:20:11 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:20:11 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:20:11 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:20:11 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:20:11 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:20:11 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:20:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:20:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:20:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:20:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:16 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:20:16 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:20:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:20:17 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:20:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:20:18 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:20:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:20:19 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:20:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:20:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:20:21 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:20:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:20:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:20:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:20:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:20:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:20:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:20:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:20:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:20:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:20:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:20:26 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:20:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:26 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:20:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:20:27 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:20:27 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:27 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:20:27 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:20:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:27 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:27 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:20:28 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:20:28 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:20:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:20:29 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:20:30 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:20:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:20:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:20:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:20:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:20:33 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:20:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:20:34 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:20:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:20:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:20:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:20:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:20:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:20:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:20:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:20:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:20:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:20:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:20:39 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:20:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:20:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:20:39 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:20:39 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:20:39 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:20:39 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:20:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:39 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:40 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:20:40 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:20:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:41 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:20:41 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:42 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:20:42 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:20:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:43 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:20:43 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:44 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:20:44 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:20:45 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:20:45 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:20:46 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:20:46 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:20:47 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:20:47 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:20:47 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:20:48 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:20:48 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:20:49 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:20:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:20:49 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:20:49 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2284 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:49 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2284 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:20:49 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2284 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:20:49 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2284 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:20:49 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2284 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:20:49 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=2284 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:20:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:20:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:20:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:20:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:20:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:20:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:20:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:20:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:20:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:20:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:20:54 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:20:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:20:55 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:20:55 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:55 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:20:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:20:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:20:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:20:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:20:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:20:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:20:56 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:21:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:21:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:21:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:21:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:21:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:21:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:21:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:21:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:21:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:21:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:21:01 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:21:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:21:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:21:02 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:21:02 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:21:02 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:21:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:21:02 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:21:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:21:02 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:21:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:21:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:21:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:21:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:21:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:21:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:21:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:21:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:21:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:21:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:21:07 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:21:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:21:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:21:08 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:21:08 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:08 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:21:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:21:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:21:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:21:10 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:21:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:21:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:11 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:21:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:21:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:21:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:21:21 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:21:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:21:21 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:21:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:21:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:21:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:21:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:21:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:21:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:21:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:21:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:21:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:21:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:21:26 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:21:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:21:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:21:26 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:21:26 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:26 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:21:26 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:21:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:21:27 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:21:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:30 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:21:30 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:31 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:21:31 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:21:32 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:21:32 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:21:33 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:21:33 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:21:34 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:21:34 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:21:35 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:21:35 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:21:36 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:21:36 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:21:37 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:21:37 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:21:37 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:21:38 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:21:38 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:21:39 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:21:39 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:21:40 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:21:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:21:40 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:21:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:21:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:21:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:21:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:21:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:21:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:21:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:21:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:21:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:21:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:21:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:21:45 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:21:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:21:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:21:46 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:21:46 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:46 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:21:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:47 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:21:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:21:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:21:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:21:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:21:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:21:49 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:21:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:21:50 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:21:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:21:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:21:51 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:21:51 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:21:52 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:21:52 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:21:53 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:21:53 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:21:54 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:21:54 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:21:55 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:21:55 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:21:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:21:56 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:21:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:21:57 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:21:57 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:21:58 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:21:58 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:21:59 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:21:59 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:22:00 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:22:00 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:22:01 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:22:01 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:22:02 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:22:02 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:22:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:22:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:22:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:22:02 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:22:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:22:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:22:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:22:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:22:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:22:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:22:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:22:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:22:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:22:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:22:07 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:22:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:22:08 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:22:08 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:22:08 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:22:08 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:22:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:22:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:09 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:22:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:22:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:10 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:22:10 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:22:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:22:11 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:22:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:22:12 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:22:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:22:13 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:22:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:22:14 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:22:14 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:22:15 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:22:15 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:22:16 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:22:16 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:22:17 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:22:17 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:22:18 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:22:18 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:22:19 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:22:19 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:22:20 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:22:20 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:22:21 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:22:21 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:22:22 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:22:22 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:22:22 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:22:23 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:22:23 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:22:24 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:22:24 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:22:25 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:22:25 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:22:26 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:22:26 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:22:27 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:22:27 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:22:28 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:22:28 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:22:29 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:22:29 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:22:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:22:29 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:22:29 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:22:29 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:22:29 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:22:29 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:22:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:22:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:22:29 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:22:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:22:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:22:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:22:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:22:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:22:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:22:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:22:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:22:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:22:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:22:34 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:22:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:22:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:22:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:22:35 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:22:35 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:22:35 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:22:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:22:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:22:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:22:36 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:22:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:22:37 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:22:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:22:38 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:22:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:39 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:22:39 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:22:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:40 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:22:40 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:22:41 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:22:41 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:22:42 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:22:42 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:22:42 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:22:43 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:22:43 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:22:44 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:22:44 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:22:45 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:22:45 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:22:46 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:22:46 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:22:47 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:22:47 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:22:48 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:22:48 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:22:49 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:22:49 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:22:50 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:22:51 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:22:51 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:22:52 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:22:52 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:22:53 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:22:53 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:22:54 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:22:54 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:22:55 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:22:55 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:22:56 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:22:56 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:22:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:22:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:22:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:22:56 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:23:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:23:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:23:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:23:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:23:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:23:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:23:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:23:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:23:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:23:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:23:01 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:23:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:23:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:23:02 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:23:02 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:23:02 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:23:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:23:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:23:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:03 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:23:03 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:23:04 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:23:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:05 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:23:05 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:06 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:23:06 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:23:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:07 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:23:07 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:23:08 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:23:08 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:23:09 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:23:09 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:23:09 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:23:10 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:23:10 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:23:11 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:23:11 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:23:12 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:23:12 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:23:13 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:23:13 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:23:14 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:23:14 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:23:15 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:23:15 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:23:16 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:23:16 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:23:17 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:23:17 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:23:17 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:23:18 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:23:18 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:23:19 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:23:19 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:23:20 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:23:20 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:23:21 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:23:21 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:23:22 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:23:22 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:23:23 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:23:23 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:23:24 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:23:24 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:23:25 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:23:25 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:23:25 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:23:26 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:23:26 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:23:27 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:23:27 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:23:28 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:23:28 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:23:29 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:23:29 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:23:30 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:23:30 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:23:31 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:23:31 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:23:32 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:23:32 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:23:33 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:23:33 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:23:33 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:23:34 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:23:34 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:23:35 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:23:35 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:23:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:23:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:23:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:23:36 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:23:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:23:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:23:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:23:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:23:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:23:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:23:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:23:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:23:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:23:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:23:41 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:23:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:23:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:23:41 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:23:41 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:23:41 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:23:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:23:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:23:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:23:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:23:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:23:42 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:23:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:23:43 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:23:44 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:45 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:23:45 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:23:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:23:46 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:23:46 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:23:47 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:23:47 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:23:48 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:23:48 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:23:49 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:23:49 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:23:49 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:23:50 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:23:50 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:23:51 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:23:51 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:23:52 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:23:52 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:23:53 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:23:53 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:23:54 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:23:54 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:23:55 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:23:55 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:23:56 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:23:56 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:23:57 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:23:57 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:23:57 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:23:58 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:23:58 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:23:59 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:23:59 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:24:00 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:24:00 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:24:01 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:24:01 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:24:02 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:24:02 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:24:03 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:24:03 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:24:04 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:24:04 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:24:05 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:24:05 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:24:05 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:24:06 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:24:06 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:24:07 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:24:07 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:24:08 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:24:08 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:24:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:09 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:24:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6074 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6074 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6074 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6074 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6074 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6074 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6074 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6074 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6075 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6075 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6075 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6075 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6075 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6075 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6075 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=6075 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:24:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:24:14 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:24:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:24:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:24:14 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:24:14 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:24:14 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:14 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:24:14 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:14 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:14 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:14 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:14 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:14 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:24:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:24:19 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:24:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:19 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:24:20 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:24:20 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:24:20 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:24:20 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:20 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:24:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:24:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:24:25 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:24:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:24:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:24:25 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:24:25 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:24:25 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:25 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:24:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:24:30 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:24:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:24:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:24:31 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:24:31 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:24:31 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:24:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:24:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:24:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:24:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:24:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:33 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:24:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:24:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:24:34 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:24:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:24:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:24:37 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:24:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:24:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:24:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:24:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:24:39 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:24:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:39 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:24:39 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:39 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:39 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:39 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:39 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:39 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:24:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:24:44 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:24:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:24:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:24:45 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:24:45 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:24:45 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:24:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:24:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:24:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:24:46 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:24:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:24:47 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:24:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:24:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:48 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:24:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:49 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:24:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:24:50 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:24:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:24:51 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:24:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:24:52 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:24:52 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:24:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:53 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:24:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:24:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:24:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:24:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:24:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:24:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:24:58 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:24:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:24:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:24:58 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:24:58 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:24:58 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:24:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:24:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:24:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:24:59 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:24:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:24:59 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:25:00 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:00 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:25:00 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:01 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:25:01 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:02 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:25:02 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:03 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:25:03 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:25:04 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:25:04 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:25:05 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:25:05 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:25:06 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:25:06 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:25:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:25:06 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:25:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:25:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:25:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:25:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:25:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:25:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:25:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:25:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:25:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:25:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:25:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:25:11 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:25:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:25:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:25:12 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:25:12 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:25:12 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:25:12 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:25:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:25:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:25:12 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:25:13 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:25:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:25:14 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:25:15 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:25:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:25:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:25:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:16 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:25:17 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:25:17 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:25:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:25:18 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:25:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:25:19 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:25:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:25:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:25:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:25:20 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:25:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:25:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:25:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:25:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:25:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:25:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:25:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:25:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:25:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:25:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:25:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:25:25 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:25:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:25:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:25:25 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:25:25 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:25:25 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:25:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:25:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:25:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:25:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:25:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:26 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:25:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:25:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:27 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:25:28 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:28 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:25:29 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:25:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:29 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:25:30 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:30 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:25:31 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:25:31 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:25:31 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:25:32 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:25:32 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:25:33 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:25:33 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:25:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:25:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:25:33 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:25:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:25:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:25:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:25:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:25:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:25:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:25:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:25:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:25:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:25:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:25:38 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:25:38 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:25:38 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:25:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:25:39 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:25:39 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:25:39 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:25:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:25:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:25:39 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:40 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:25:40 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:25:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:41 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:25:41 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:25:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:42 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:25:42 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:43 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:25:43 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:44 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:25:44 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:25:45 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:25:45 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:25:46 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:25:46 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:25:47 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:25:47 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:25:47 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:25:48 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:25:48 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:25:49 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:25:50 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:25:50 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:25:51 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:25:51 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:25:52 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:25:52 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:25:53 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:25:53 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:25:54 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:25:54 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:25:55 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:25:55 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:25:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:25:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:25:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:25:55 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:25:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:25:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:26:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:26:00 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:26:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:26:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:26:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:26:01 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:26:01 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:26:01 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:26:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:26:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:26:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:26:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:02 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:26:03 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:26:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:03 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:26:04 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:26:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:04 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:26:05 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:26:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:05 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:26:06 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:26:06 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:26:07 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:26:07 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:26:08 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:26:08 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:26:09 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:09 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:09 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:26:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:26:14 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:26:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:26:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:26:14 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:26:14 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:26:14 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:26:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:26:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:26:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:26:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:26:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:26:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:26:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:26:18 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:26:19 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:26:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:26:20 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:26:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:26:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:26:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:26:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:26:23 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:26:23 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:26:24 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:26:24 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:26:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:26:25 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:26:26 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:26:26 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:26:26 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:26:27 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:26:27 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:26:28 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:26:28 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:26:29 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:26:29 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:26:30 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:26:30 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:30 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3598 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3598 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3598 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3598 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3598 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3598 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3598 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:30 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3598 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:26:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:26:35 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:26:35 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:35 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:26:36 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:26:36 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:26:36 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:26:36 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:36 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:26:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:26:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:26:41 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:26:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:26:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:26:42 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:26:42 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:26:42 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:42 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:26:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:26:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:26:47 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:26:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:26:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:26:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:26:47 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:26:47 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:26:47 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:47 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:26:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:47 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:26:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:26:52 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:26:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:26:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:26:53 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:26:53 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:26:53 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:53 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:26:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:26:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:26:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:26:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:26:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:26:58 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:26:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:26:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:26:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:26:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:26:58 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:26:58 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:26:58 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:26:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:26:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:26:58 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:27:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:27:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:27:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:27:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:27:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:27:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:27:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:27:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:27:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:27:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:27:03 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:27:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:27:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:27:04 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:27:04 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:27:04 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:27:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:27:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:27:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:27:04 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:27:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:04 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:27:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:27:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:27:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:27:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:27:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:27:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:27:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:27:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:27:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:27:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:27:09 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:27:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:27:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:27:10 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:27:10 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:27:10 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:27:10 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:27:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:27:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:27:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:27:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:27:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:27:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:27:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:27:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:27:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:27:14 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:27:15 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:27:15 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:27:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:27:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:27:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:27:18 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:27:19 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:27:19 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:27:20 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:27:20 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:27:21 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:27:21 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:27:22 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:27:22 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:27:23 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:27:23 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:27:24 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:27:24 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:27:25 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:27:25 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:27:26 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:27:26 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:27:26 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:27:27 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:27:27 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:27:28 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:27:28 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:27:29 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:27:29 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:27:30 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:27:30 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:27:31 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:27:31 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:27:32 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:27:32 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:27:33 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:27:33 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:27:34 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:27:34 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:27:34 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:27:35 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:27:35 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:27:36 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:27:36 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:27:37 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:27:37 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:27:38 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:27:38 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:27:39 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:27:39 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:27:40 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:27:40 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:27:41 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:27:41 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:27:42 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:27:42 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:27:42 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:27:43 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:27:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:27:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:27:43 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:27:43 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7374 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:43 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7374 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:43 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7374 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:43 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7374 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:43 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7374 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:43 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=7374 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:27:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:27:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:27:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:27:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:27:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:27:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:27:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:27:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:27:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:27:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:27:48 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:27:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:27:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:27:49 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:27:49 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:27:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:27:49 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:27:49 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:27:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:27:50 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:27:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:50 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:27:51 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:51 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:27:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:27:52 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:27:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:27:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:27:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:27:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:27:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:27:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:27:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:27:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:27:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:27:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:27:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:27:57 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:27:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:27:57 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:27:57 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:27:57 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:27:57 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:27:57 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:27:58 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:27:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:58 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:27:59 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:27:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:27:59 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:28:00 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:28:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:00 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:28:00 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:28:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:01 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:28:01 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:28:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:02 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:28:02 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:28:03 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:28:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:03 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:28:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1423 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1423 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1423 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1423 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1423 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1423 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1423 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:28:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:28:08 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:28:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:28:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:28:09 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:28:09 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:28:09 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:28:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:28:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:28:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:28:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:28:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:28:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:13 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:28:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:28:14 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:28:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:15 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:28:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1422 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1422 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1422 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1422 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1422 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1422 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:28:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:28:20 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:28:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:20 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:28:20 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:28:20 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:28:20 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:28:20 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:28:21 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:28:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:21 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:28:22 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:22 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:28:23 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:23 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:28:24 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:24 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:28:25 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:25 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:28:26 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:28:26 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:28:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:26 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:28:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:28:31 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:28:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:31 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:28:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:28:32 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:28:32 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:28:32 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:28:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:28:32 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:28:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:28:33 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:28:34 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:28:35 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:36 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:28:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:28:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:28:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:28:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:28:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:28:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:28:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:28:39 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:28:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:28:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:40 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:28:40 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:40 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:40 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:40 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:40 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:40 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:28:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:28:45 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:28:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:28:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:28:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:28:46 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:28:46 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:28:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:28:46 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:28:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:28:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:47 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:28:47 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:28:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:28:48 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:28:49 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:28:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:28:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:50 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:28:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=987 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=987 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=987 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=987 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=987 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=987 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:28:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:28:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:28:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:28:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:28:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:28:55 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:28:55 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:28:55 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:28:55 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:28:55 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:28:55 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:28:55 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:28:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:28:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:28:55 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:28:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:29:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:29:00 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:29:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:29:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:29:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:29:01 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:29:01 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:01 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:01 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:29:01 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:01 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:01 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:01 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:01 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:01 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:29:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:29:06 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:29:06 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:06 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:29:06 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:29:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:29:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:29:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:29:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:29:06 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:29:06 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:29:06 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:06 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:06 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:29:06 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:06 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:06 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:06 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:06 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:06 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:29:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:29:11 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:29:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:29:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:29:12 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:29:12 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:12 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:29:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:29:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:29:12 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:29:13 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:29:14 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:29:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:15 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:29:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=792 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=792 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=792 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:15 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=792 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:29:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:29:20 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:29:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:20 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:29:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:29:21 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:29:21 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:29:21 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:29:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:29:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:29:21 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:29:22 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:29:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:22 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:29:23 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:29:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:23 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:24 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:24 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:29:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:24 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:24 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:29:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:29:29 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:29:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:29:30 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:29:30 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:29:30 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:29:30 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:30 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:29:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:29:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:29:30 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:31 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:29:31 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:29:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:32 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:29:32 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:29:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:33 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:29:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:29:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:33 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:34 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:29:34 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:35 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:29:35 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:29:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:29:36 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:29:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:29:37 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:29:37 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:29:38 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:29:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:38 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:29:38 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:29:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:29:43 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:29:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:29:44 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:29:44 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:29:44 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:29:44 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:29:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:29:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:29:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:45 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:29:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:29:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:46 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:29:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:29:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:29:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:47 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:47 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:29:48 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:29:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:48 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:29:49 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:29:49 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:29:50 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:29:50 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:29:51 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:29:51 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:29:52 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:29:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:52 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:29:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:29:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:29:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:29:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:29:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:29:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:29:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:29:57 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:29:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:29:57 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:29:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:29:57 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:29:57 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:29:57 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:29:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:29:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:29:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:29:58 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:58 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:29:59 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:29:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:29:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:29:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:29:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:29:59 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:30:00 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:30:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:00 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:30:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:30:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:00 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:30:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:01 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:30:01 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:02 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:30:02 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:30:03 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:30:03 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:30:04 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:30:04 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:30:05 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:30:05 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:05 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1866 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1866 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:30:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:30:10 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:30:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:30:11 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:30:11 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:30:11 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:11 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:30:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:12 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:30:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:30:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:30:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:30:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:30:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:15 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:16 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:30:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1213 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1213 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1213 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1213 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1213 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1213 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:30:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:30:21 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:30:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:30:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:30:21 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:30:21 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:21 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:30:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:30:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:30:22 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:30:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:30:23 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:23 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:30:24 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:24 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:30:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:30:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:30:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:25 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:30:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:25 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:30:26 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:30:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:26 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:30:27 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:30:27 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:27 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:30:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1343 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1343 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1343 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1343 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1343 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1343 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:30:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:30:32 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:30:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:30:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:30:33 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:30:33 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:33 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:30:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:30:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:30:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:35 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:30:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:30:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:30:36 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:36 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:30:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=830 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=830 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=830 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=830 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=830 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=830 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=830 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:30:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:30:41 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:30:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:30:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:30:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:30:42 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:30:42 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:42 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:30:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:30:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:30:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:30:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:30:44 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:30:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:45 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:30:50 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:30:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:30:50 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:30:50 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:30:50 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:30:50 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:50 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:30:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=176 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=176 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=176 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=176 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=176 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:50 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=176 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:30:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:30:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:30:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:30:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:30:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:30:55 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:30:55 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:30:55 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:30:56 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:30:56 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:30:56 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:30:56 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:30:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:30:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:30:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:30:56 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:31:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:31:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:31:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:31:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:31:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:31:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:31:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:31:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:31:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:31:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:31:01 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:31:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:31:02 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:31:02 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:31:02 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:31:02 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:31:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:31:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:31:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:03 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:31:03 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:31:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:31:04 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:05 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:31:05 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:06 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:31:06 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:31:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:06 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:31:07 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:31:07 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:31:08 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:31:08 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:31:09 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:31:09 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:31:10 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:31:10 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:31:11 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:31:11 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:31:12 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:31:12 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:31:13 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:31:13 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:31:14 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:31:14 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:31:14 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:31:15 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:31:15 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:31:16 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:31:16 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:31:17 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:31:17 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:31:18 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:31:18 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:31:19 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:31:19 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:31:20 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:31:20 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:31:21 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:31:21 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:31:22 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:31:22 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:31:22 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:31:23 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:31:23 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:31:24 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:31:24 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:31:25 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:31:25 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:31:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:31:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:31:25 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:31:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5236 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:31:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5236 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5236 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:25 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5236 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:31:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:31:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:31:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:31:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:31:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:31:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:31:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:31:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:31:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:31:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:31:30 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:31:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:31:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:31:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:31:31 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:31:31 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:31:31 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:31:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:31:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:31:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:31:31 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -20419us; resetting the clock
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:31:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:33 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:31:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:31:34 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:31:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:31:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:31:37 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:31:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:31:38 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:31:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:31:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:31:39 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:31:39 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:31:40 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:31:40 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:31:41 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:31:41 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:31:42 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:31:42 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:31:43 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:31:43 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:31:44 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:31:44 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:31:45 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:31:45 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:31:46 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:31:46 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:31:46 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:31:47 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:31:47 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:31:48 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:31:48 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:31:49 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:31:49 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:31:50 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:31:50 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:31:51 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:31:51 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:31:52 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:31:52 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:31:53 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:31:53 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:31:54 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:31:54 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:31:54 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:31:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:31:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:31:55 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:31:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5230 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5230 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5230 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5230 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5230 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5230 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:31:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=5230 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:32:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:32:00 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:32:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:32:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:32:00 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:32:00 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:00 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:32:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:32:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:32:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:32:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:01 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:32:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:02 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:32:02 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:32:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:03 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:32:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:32:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:32:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:32:03 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:32:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:32:03 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:04 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:04 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:32:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:32:09 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:32:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:32:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:32:10 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:10 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:32:10 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:10 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:32:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:32:15 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:32:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:32:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:32:15 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:32:15 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:32:15 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:32:15 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:16 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:32:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:32:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:32:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:17 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:32:18 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:18 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:32:19 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:32:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:19 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:32:20 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:20 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:32:21 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:32:21 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:32:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:32:22 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:32:22 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:32:23 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:32:23 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:23 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:32:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:32:28 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:32:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:32:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:32:29 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:32:29 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:32:29 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:32:29 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:32:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:31 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:32:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:32:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:32 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:32:32 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:32:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:33 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:32:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:32:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:34 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:32:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:32:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:32:36 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:32:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:32:37 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:37 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:32:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:32:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:32:42 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:32:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:32:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:32:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:32:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:32:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:32:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:32:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:32:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:32:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:32:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:32:42 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:32:43 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:32:43 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:32:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:32:45 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:46 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:32:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:32:51 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:32:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:32:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:32:51 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:32:51 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:51 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:32:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:32:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:32:51 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:32:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:52 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:32:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:52 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:32:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:32:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:32:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:32:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:32:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:32:57 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:32:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:32:57 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:32:57 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:32:57 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:32:57 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:32:57 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:32:57 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:32:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:32:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:32:57 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:32:57 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:33:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:33:02 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:33:02 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:02 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:33:03 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:33:03 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:33:03 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:33:03 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:33:03 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:33:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:33:03 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:33:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:04 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:33:04 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:33:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:04 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:33:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:05 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:33:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=556 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=556 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=556 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=556 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=556 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=556 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:33:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:33:10 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:33:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:33:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:33:10 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:33:10 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:33:10 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:33:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:33:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:33:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:33:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:33:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:33:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:13 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:33:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:33:18 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:33:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:18 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:33:19 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:33:19 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:33:19 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:33:19 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:33:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:33:19 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:20 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:33:20 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:20 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:21 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:33:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=571 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=571 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=571 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:33:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:33:26 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:33:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:33:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:33:26 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:33:26 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:33:26 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:33:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:33:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:33:27 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:33:28 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:33:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:28 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:33:29 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:29 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:29 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:33:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:33:34 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:33:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:33:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:33:35 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:33:35 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:33:35 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:33:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:33:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:33:36 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:33:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:36 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:37 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:33:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=570 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=570 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=570 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=570 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=570 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:33:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:33:42 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:33:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:33:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:33:42 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:33:42 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:33:42 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:33:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:33:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:33:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:33:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:43 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:33:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:33:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:33:45 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:33:45 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:46 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:46 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=927 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=928 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=928 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=928 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=928 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=928 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=928 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=928 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=928 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=929 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=929 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=929 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=929 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=929 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=929 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=929 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:46 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=929 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:33:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:33:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:33:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:33:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:33:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:33:51 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:33:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:33:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:33:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:33:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:33:52 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:33:52 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:33:52 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:33:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:33:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:52 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:33:53 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:33:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:53 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:33:54 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:33:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:54 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:33:55 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:33:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:55 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:33:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:33:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:33:56 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=978 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=978 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=979 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=979 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=979 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=979 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=979 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=979 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=979 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:33:56 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=979 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:01 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:01 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:01 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:01 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:01 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:01 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:02 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:34:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:34:02 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:03 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:03 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=550 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=550 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=550 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=550 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=550 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=551 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=551 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=551 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=551 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=551 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=551 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=551 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:03 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=551 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:08 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:09 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:09 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:09 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:34:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:34:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:34:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:34:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:34:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:34:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:34:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:11 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:12 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:34:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=768 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=768 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=768 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=768 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=768 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=768 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=768 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:12 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=768 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:17 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:17 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:17 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:17 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:17 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:17 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:34:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:17 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:22 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:22 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:22 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:23 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:34:23 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:34:23 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:23 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:23 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:34:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:34:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:34:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:23 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:34:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:24 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:34:24 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:25 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:34:25 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:26 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:26 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=775 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=775 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:26 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:31 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:31 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:31 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:31 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:34:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:31 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:34:31 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:31 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:36 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:36 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:36 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:37 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:34:37 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:34:37 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:37 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:37 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:37 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:34:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:37 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:42 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:34:43 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:34:43 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:43 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:43 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:43 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:34:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:48 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:34:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:34:48 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:48 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:48 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:48 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:53 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:34:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:34:54 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:54 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:54 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:54 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:34:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:34:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:34:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:34:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:34:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:34:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:34:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:34:59 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:34:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:34:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:34:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:34:59 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:34:59 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:34:59 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:34:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:34:59 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:00 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:35:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:00 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:35:01 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:35:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:01 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:35:02 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:02 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:35:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:35:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:35:03 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:35:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:03 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:35:03 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:35:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:04 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:35:04 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:05 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1255 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:05 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:35:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:35:10 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:35:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:35:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:35:10 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:35:10 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:35:10 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:10 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:35:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:35:15 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:35:15 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:15 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:35:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:35:16 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:35:16 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:16 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:16 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:35:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:16 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:35:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:35:21 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:35:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:35:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:35:21 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:35:21 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:35:21 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:21 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:21 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:35:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:21 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:35:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:35:26 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:35:26 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:26 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:35:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:35:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:35:27 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:35:27 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:27 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:27 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:35:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:35:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:35:32 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:35:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:35:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:35:33 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:35:33 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:35:33 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:33 [DEBUG] fake_trx.py:377 (BTS@172.18.77.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-04-07 06:35:33 [INFO] fake_trx.py:380 (BTS@172.18.77.20:5700) Artificial TRXC delay set to 200
2025-04-07 06:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=113 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=114 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=115 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=116 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=117 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=154): ver=1 fn=118 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -252us; resetting the clock
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=118 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=118 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=118 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=118 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=118 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=118 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=119 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=119 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=119 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=119 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=119 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=119 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=119 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=119 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=120 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=120 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=155): ver=1 fn=120 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=120 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=121 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=122 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=123 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=124 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=125 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=126 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=127 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=128 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=129 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=130 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=131 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=132 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=156): ver=1 fn=133 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -1053us; resetting the clock
2025-04-07 06:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=162 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=162 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=162 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=162 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=162 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=162 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=162 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=162 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=163 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=163 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=163 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=163 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=163 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=163 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=163 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=163 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=164 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=164 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=164 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=164 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=164 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=164 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=164 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=164 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=165 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=165 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=165 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=165 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=165 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=165 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=165 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=165 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=166 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=166 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=166 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=166 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=166 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=166 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=166 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=166 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=167 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=167 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=167 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=167 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=167 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=167 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=167 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=167 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=168 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=168 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=168 tn=2 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=168 tn=3 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=168 tn=4 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=203): ver=1 fn=168 tn=5 bl=148 pwr=0
2025-04-07 06:35:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:35:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=246): ver=1 fn=168 tn=6 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=246): ver=1 fn=168 tn=7 bl=148 pwr=0
2025-04-07 06:35:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=290): ver=1 fn=169 tn=0 bl=148 pwr=0
2025-04-07 06:35:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=290): ver=1 fn=169 tn=1 bl=148 pwr=0
2025-04-07 06:35:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=169 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=169 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=169 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=169 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=169 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=169 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=170 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=170 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=170 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=170 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=170 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=170 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=170 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=170 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=171 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=171 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=171 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=171 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=171 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=171 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=171 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=171 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=172 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=173 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=174 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=175 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=176 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=177 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=178 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=333): ver=1 fn=179 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -3266us; resetting the clock
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=179 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=179 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=179 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=179 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=179 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=180 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=180 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=180 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=180 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=180 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=180 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=334): ver=1 fn=180 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=180 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=181 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=181 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=181 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=181 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=181 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=181 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=181 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=181 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=182 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=182 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=182 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=182 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=182 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=182 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=182 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=205 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=205 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=205 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=205 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=205 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=205 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=205 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=205 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=206 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=206 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=206 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=206 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=206 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=206 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=206 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=206 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=207 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=207 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=207 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=207 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=207 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=207 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=207 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=207 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=208 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=208 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=208 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=208 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=208 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=208 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=208 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=208 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=209 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=209 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=209 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=209 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=209 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=209 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=209 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=209 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=210 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=335): ver=1 fn=210 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:34 [DEBUG] fake_trx.py:377 (BTS@172.18.77.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-04-07 06:35:34 [INFO] fake_trx.py:380 (BTS@172.18.77.20:5700) Artificial TRXC delay set to 0
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=422 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=422 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=422 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=422 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=422 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=422 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=422 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=422 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=423 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=423 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=423 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=423 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=423 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=423 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=423 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=423 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=424 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=424 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=424 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=424 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=424 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=424 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=424 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=424 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=425 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=425 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=425 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=425 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=425 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=425 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=425 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=425 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=426 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=426 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=426 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=426 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=426 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=426 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=426 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=426 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=427 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=427 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=427 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=427 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=427 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=427 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=427 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=427 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=428 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=428 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=428 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=428 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=428 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=428 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=428 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=428 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=429 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=429 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=429 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=429 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=429 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=429 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=429 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=429 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=430 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=430 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=430 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=430 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=430 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=430 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=430 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=430 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=431 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=431 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=431 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=431 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=431 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=431 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=431 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=431 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=432 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=432 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=432 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=432 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=432 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=432 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=432 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=432 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=433 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=434 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=435 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=436 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=436 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=436 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=436 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=436 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=436 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=436 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=436 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=437 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=437 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=437 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=437 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=437 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=437 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=437 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=437 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=438 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=438 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=438 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=438 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=438 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=438 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=438 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=438 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=439 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=439 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=439 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=439 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=439 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=439 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=439 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=439 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=440 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=440 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=440 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=440 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=440 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=440 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=440 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=440 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=441 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=441 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=441 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=441 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=441 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=441 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=441 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=441 tn=7 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=442 tn=0 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=442 tn=1 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=442 tn=2 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=442 tn=3 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=442 tn=4 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=442 tn=5 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=463): ver=1 fn=442 tn=6 bl=148 pwr=0
2025-04-07 06:35:34 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -1055us; resetting the clock
2025-04-07 06:35:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=465 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=466 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=466 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=466 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=466 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=466 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=466 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=466 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:34 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=466 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:35:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:35:39 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:35:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:35:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:35:40 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:35:40 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:40 [DEBUG] fake_trx.py:377 (BTS@172.18.77.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-04-07 06:35:40 [INFO] fake_trx.py:380 (BTS@172.18.77.20:5700) Artificial TRXC delay set to 200
2025-04-07 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=118 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=119 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=120 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=121 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=122 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=123 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=124 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=125 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=126 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=127 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=128 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=129 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=130 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=131 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=132 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=133 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=134 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=135 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=136 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=137 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=160): ver=1 fn=138 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -7307us; resetting the clock
2025-04-07 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:40 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=206): ver=1 fn=167 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=167 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=168 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=169 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=170 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=171 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=172 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=173 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=174 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=175 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=176 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=177 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=178 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=179 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=180 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=181 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=182 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=183 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=184 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=185 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=186 tn=7 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=1 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=2 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=3 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=4 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=5 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=207): ver=1 fn=187 tn=6 bl=148 pwr=0
2025-04-07 06:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=250): ver=1 fn=208 tn=0 bl=148 pwr=0
2025-04-07 06:35:40 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=250): ver=1 fn=208 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=293): ver=1 fn=208 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=293): ver=1 fn=208 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=293): ver=1 fn=208 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=337): ver=1 fn=208 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=337): ver=1 fn=208 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=208 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=209 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=209 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=209 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=209 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=209 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=209 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=209 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=209 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=380): ver=1 fn=210 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=424): ver=1 fn=210 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=424): ver=1 fn=210 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] fake_trx.py:377 (BTS@172.18.77.20:5700) Recv FAKE_TRXC_DELAY cmd
2025-04-07 06:35:41 [INFO] fake_trx.py:380 (BTS@172.18.77.20:5700) Artificial TRXC delay set to 0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD FAKE_TRXC_DELAY
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=210 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=210 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=210 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=210 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=210 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=211 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=212 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=213 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=467): ver=1 fn=214 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=214 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=214 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=214 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=214 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=214 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=214 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=215 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=215 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=215 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=215 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=215 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=215 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=215 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=215 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=216 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=216 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=216 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=216 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=216 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=216 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=216 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=216 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=217 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=217 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=217 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=217 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=217 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=217 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=217 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=217 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=218 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=218 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=218 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=218 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=218 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=218 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=218 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=218 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=219 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=219 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=219 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=219 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=219 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=219 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=219 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=219 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=220 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=220 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=220 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=220 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=220 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=220 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=220 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=220 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=221 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=221 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=221 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=221 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=221 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=221 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=221 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=221 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=468): ver=1 fn=222 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -2585us; resetting the clock
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=469): ver=1 fn=222 tn=1 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=469): ver=1 fn=222 tn=2 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=469): ver=1 fn=222 tn=3 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=469): ver=1 fn=222 tn=4 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=469): ver=1 fn=222 tn=5 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=469): ver=1 fn=222 tn=6 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=469): ver=1 fn=222 tn=7 bl=148 pwr=0
2025-04-07 06:35:41 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=469): ver=1 fn=223 tn=0 bl=148 pwr=0
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:41 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=223 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=223 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=223 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=224 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=224 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=224 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=224 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=224 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=224 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=224 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=224 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=225 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=225 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=225 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=225 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=225 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=225 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=225 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=225 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=226 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=226 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=226 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=226 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=226 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=226 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=226 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=226 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=227 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=227 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=228 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=228 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=228 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=228 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=228 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=228 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=228 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=470 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=470 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=470 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=470 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=470 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=470 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=470 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=470 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=471 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=472 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=472 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=473 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=473 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=473 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=473 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=473 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=473 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=473 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:41 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=473 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:35:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:35:46 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:35:46 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:46 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:35:47 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:35:47 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:35:47 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:35:47 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:35:47 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:47 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:35:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:35:52 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:35:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:35:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:35:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:35:52 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:35:52 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:35:52 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:53 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:35:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:53 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:35:58 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:35:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:35:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:35:58 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:35:58 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:35:58 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:58 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:35:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:35:59 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:35:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:35:59 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:35:59 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:36:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:00 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:36:00 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:01 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:01 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:02 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:36:02 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:03 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:36:03 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:36:04 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:36:04 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:05 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:36:05 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:36:06 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:36:06 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:36:07 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:36:07 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:07 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:08 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:36:08 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:09 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:36:09 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:36:10 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:36:10 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:36:11 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:36:11 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:36:12 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:12 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:36:13 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:36:13 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:36:14 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:36:14 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:36:15 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:15 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:36:15 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:36:16 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:36:16 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:36:17 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:36:18 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:18 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:36:19 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:36:19 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:20 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:20 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:36:21 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:36:21 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:36:22 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:36:22 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:36:23 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:23 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:23 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:36:24 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:36:24 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:36:25 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:36:25 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:36:26 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:26 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:36:27 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:36:27 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:36:28 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:36:28 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:36:29 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:36:29 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:30 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:36:30 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:31 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:36:31 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:36:31 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:36:32 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-07 06:36:32 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-07 06:36:33 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:33 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:34 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-07 06:36:34 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-07 06:36:35 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-07 06:36:35 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-07 06:36:36 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-07 06:36:36 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:37 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-07 06:36:37 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-07 06:36:38 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-07 06:36:38 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-07 06:36:39 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-07 06:36:39 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-07 06:36:39 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:40 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:40 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:36:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:36:40 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:36:40 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=9284 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:36:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:36:40 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=9284 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:36:40 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=9284 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:36:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:36:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:36:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:36:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:36:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:36:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:36:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:36:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:36:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:36:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:36:45 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:36:45 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:45 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:36:46 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:36:46 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:36:46 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:36:46 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:36:46 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:46 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:36:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:36:47 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:36:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:36:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:36:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:36:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:36:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:36:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:36:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:36:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:36:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:36:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:36:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:36:52 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:36:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:36:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:36:52 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:36:52 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:36:52 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:36:52 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:53 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:54 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:36:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:36:54 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:36:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:36:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:36:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:36:55 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:36:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=602 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:36:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=602 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:36:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=602 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:36:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=602 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:36:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=602 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:36:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=602 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:37:00 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:37:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:37:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:37:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:37:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:37:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:37:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:37:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:37:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:37:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:37:00 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:37:00 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:37:00 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:00 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:01 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:02 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=449 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=449 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=449 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=449 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=449 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=449 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=450 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=450 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=450 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=450 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=450 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=450 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=450 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=450 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:37:07 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:37:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:37:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:37:07 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:37:07 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:37:07 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:08 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:08 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:37:08 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:08 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:08 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:08 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:08 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:08 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:37:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:37:13 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:37:13 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:13 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:37:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:37:14 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:37:14 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:37:14 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:14 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:37:15 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:37:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:16 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:37:17 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:37:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:18 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:37:19 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:37:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:20 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:37:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:37:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:37:21 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:22 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1741 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1741 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1741 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1741 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1741 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1741 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1741 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:22 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1741 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:37:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:37:27 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:37:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:37:27 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:37:27 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:37:27 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:37:27 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:27 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:27 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:37:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:28 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:37:28 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:29 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:30 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:37:30 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:31 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:31 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:32 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:37:32 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:37:33 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:33 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:37:34 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:37:34 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:35 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:35 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:37:40 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:37:40 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:37:40 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:37:40 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:37:40 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:37:40 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:41 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:37:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:41 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:37:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:42 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:37:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:43 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:37:43 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:37:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:44 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:37:44 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:45 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:45 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:46 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:37:46 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:37:47 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:37:47 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:48 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:48 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:37:49 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:37:49 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:37:49 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:50 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:50 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:51 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:37:51 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:37:52 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:52 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:53 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:53 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:37:54 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:37:54 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:55 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:55 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:56 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:37:56 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:37:57 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:57 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:37:57 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:37:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:58 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:37:58 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:37:59 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:37:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:37:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:37:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:37:59 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:37:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4274 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4274 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4274 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4274 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4274 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:37:59 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=4274 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:38:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:38:04 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:38:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:04 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:38:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:38:05 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:38:05 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:06 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:38:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:38:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:38:11 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:38:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:38:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:38:12 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:38:12 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:12 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:12 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:13 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:13 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:14 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:15 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:15 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:16 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:38:21 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:38:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:38:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:38:21 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:38:21 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:21 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [WARNING] transceiver.py:287 (MS@172.18.77.22:6700) RX TRXD message (fn=197 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:22 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:23 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:38:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:38:28 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:38:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:38:28 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:38:28 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:38:28 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:28 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:29 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:30 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:30 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:31 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:31 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:32 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:32 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:33 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:33 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:38:34 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:34 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:35 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:38:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:36 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:36 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=1740 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:38:41 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:38:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:38:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:38:41 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:38:41 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:41 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:42 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=296 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=296 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:38:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:38:47 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:38:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:38:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:38:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:38:48 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:38:48 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:38:48 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:48 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:49 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:38:54 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:38:54 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:38:54 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:38:54 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:38:54 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:38:54 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:54 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:38:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:38:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:38:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:38:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:38:55 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:38:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:38:55 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:39:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:39:00 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:39:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:00 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:39:01 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:39:01 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:39:01 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:39:01 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:01 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:02 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:02 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:39:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=347 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=347 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=347 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=347 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=347 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:02 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=347 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:39:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:39:07 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:39:07 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:39:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:39:07 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:39:07 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:39:07 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:07 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:08 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:08 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:09 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:09 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:10 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:39:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:10 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:11 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:39:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:39:16 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:39:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:39:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:39:16 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:39:16 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:39:16 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:39:16 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:39:16 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:39:16 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:39:16 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:39:16 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:39:16 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:39:16 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:39:16 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:17 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:17 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:17 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:18 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:18 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:19 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:19 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:39:19 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:19 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:19 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:19 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:19 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:19 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:39:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:39:24 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:39:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:24 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:39:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:39:25 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:39:25 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:39:25 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:39:25 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:25 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:26 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:26 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:27 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:27 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:28 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:28 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:39:28 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=791 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:28 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=791 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:28 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=791 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:28 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=791 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:28 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=791 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:28 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=791 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:39:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:39:33 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:39:33 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:39:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:39:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:39:33 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:39:33 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:39:33 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:34 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:35 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:35 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:39:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:36 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:39:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:36 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:37 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:39:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:39:42 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:39:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:39:42 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:39:42 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:39:42 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:39:42 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:39:42 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:42 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:42 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:39:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:39:47 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:39:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:39:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:39:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:39:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:39:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:39:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:39:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:39:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:39:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:39:48 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:39:48 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:39:48 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:39:48 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:48 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:39:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:39:53 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:39:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:39:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:39:53 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:39:53 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:39:53 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:39:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:53 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:39:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:39:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:39:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:39:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:39:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:39:58 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:39:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:39:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:39:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:39:58 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:40:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:40:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:40:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:40:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:40:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:40:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:40:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:40:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:40:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:40:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:40:03 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:40:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:40:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:40:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:40:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:40:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:40:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:40:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:40:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:40:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:40:04 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=105): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:40:04 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:40:04 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:40:04 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:40:05 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:05 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:40:06 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:06 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:40:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:07 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:40:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:08 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:40:09 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:10 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:10 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:11 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:40:11 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:12 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:12 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:13 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:13 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:40:14 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:14 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:40:15 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:15 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:40:16 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:16 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:40:16 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:17 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:40:17 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:18 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:40:18 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:19 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:40:19 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:20 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:40:20 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:40:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:40:20 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:40:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3709 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:40:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3709 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3709 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3709 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3709 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:20 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=3709 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:40:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:40:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:40:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:40:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:40:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:40:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:40:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:40:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:40:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:40:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:40:25 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:40:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:40:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:40:26 [DEBUG] fake_trx.py:273 (BTS@172.18.77.20:5700) Recv FAKE_TOA cmd
2025-04-07 06:40:26 [DEBUG] fake_trx.py:292 (BTS@172.18.77.20:5700) Recv FAKE_RSSI cmd
2025-04-07 06:40:26 [DEBUG] fake_trx.py:317 (BTS@172.18.77.20:5700) Recv FAKE_CI cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:40:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD ECHO
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.77.22:6700) Recv POWERON CMD
2025-04-07 06:40:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.77.22:6700) Starting transceiver...
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.77.22:6700) Recv RXTUNE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.77.22:6700) Recv TXTUNE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:27 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD NOHANDOVER
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.77.22:6700) Ignore CMD SETSLOT
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.77.22:6700) Recv POWEROFF cmd
2025-04-07 06:40:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.77.22:6700) Stopping transceiver...
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.77.20:5700) Recv SETPOWER cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.77.20:5700/1) Recv SETPOWER cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.77.20:5700/2) Recv SETPOWER cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.77.20:5700/3) Recv SETPOWER cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:40:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:40:27 [INFO] transceiver.py:276 Stopping clock generator
2025-04-07 06:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:40:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=349 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=349 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=349 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=349 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=349 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:27 [WARNING] transceiver.py:287 (BTS@172.18.77.20:5700) RX TRXD message (ver=1 fn=349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.77.20:5700) Recv POWEROFF cmd
2025-04-07 06:40:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.77.20:5700) Stopping transceiver...
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:40:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.77.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.77.20:5700) Recv SETFORMAT cmd
2025-04-07 06:40:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.77.20:5700) TRXD header version 1 -> 1
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.77.20:5700/1) Recv RXTUNE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.77.20:5700/1) Recv TXTUNE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:40:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.77.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.77.20:5700/1) Recv NOMTXPOWER cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.77.20:5700/1) Recv SETFORMAT cmd
2025-04-07 06:40:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.77.20:5700/1) TRXD header version 1 -> 1
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.77.20:5700/2) Recv RXTUNE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.77.20:5700/2) Recv TXTUNE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:40:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.77.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.77.20:5700/2) Recv NOMTXPOWER cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.77.20:5700/2) Recv SETFORMAT cmd
2025-04-07 06:40:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.77.20:5700/2) TRXD header version 1 -> 1
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.77.20:5700/3) Recv RXTUNE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.77.20:5700/3) Recv TXTUNE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:40:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.77.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.77.20:5700/3) Recv NOMTXPOWER cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.77.20:5700/3) Recv SETFORMAT cmd
2025-04-07 06:40:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.77.20:5700/3) TRXD header version 1 -> 1
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.77.20:5700) Recv RXTUNE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETTSC
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETTSC
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETTSC
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.77.20:5700) Recv TXTUNE cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETRXGAIN
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETRXGAIN
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETTSC
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETRXGAIN
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.77.20:5700) Recv NOMTXPOWER cmd
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.77.20:5700) Recv POWERON CMD
2025-04-07 06:40:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.77.20:5700) Starting transceiver...
2025-04-07 06:40:32 [INFO] transceiver.py:273 Starting clock generator
2025-04-07 06:40:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETRXGAIN
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.77.20:5700/1) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.77.20:5700/2) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.77.20:5700/3) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.77.20:5700) Ignore CMD SETSLOT
2025-04-07 06:40:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-07 06:40:33 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-07 06:40:33 [WARNING] transceiver.py:330 (BTS@172.18.77.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-07 06:40:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-07 06:40:34 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-07 06:40:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-07 06:40:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-07 06:40:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-07 06:40:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-07 06:40:36 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-07 06:40:36 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-07 06:40:37 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-07 06:40:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-07 06:40:38 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-07 06:40:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-07 06:40:39 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-07 06:40:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-07 06:40:40 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-07 06:40:40 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-07 06:40:41 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-07 06:40:41 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-07 06:40:42 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-07 06:40:42 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-07 06:40:42 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-07 06:40:43 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-07 06:40:43 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-07 06:40:44 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-07 06:40:44 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-07 06:40:45 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-07 06:40:45 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-07 06:40:46 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-07 06:40:46 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-07 06:40:47 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-07 06:40:47 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-07 06:40:48 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-07 06:40:48 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-07 06:40:49 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-07 06:40:49 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-07 06:40:50 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-07 06:40:50 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-07 06:40:50 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-07 06:40:51 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-07 06:40:51 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-07 06:40:52 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-07 06:40:52 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-07 06:40:53 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-07 06:40:53 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-07 06:40:54 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-07 06:40:54 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-07 06:40:55 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-07 06:40:55 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-07 06:40:56 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-07 06:40:56 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-07 06:40:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.77.20:5700/3) Recv RFMUTE cmd
2025-04-07 06:40:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.77.20:5700) Recv RFMUTE cmd
2025-04-07 06:40:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.77.20:5700/1) Recv RFMUTE cmd
2025-04-07 06:40:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.77.20:5700/2) Recv RFMUTE cmd
2025-04-07 06:40:57 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-07 06:40:57 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-07 06:40:58 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-07 06:40:58 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-07 06:40:58 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-07 06:40:59 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-07 06:40:59 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-07 06:41:00 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-07 06:41:00 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-07 06:41:01 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-07 06:41:01 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-07 06:41:02 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-07 06:41:02 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-07 06:41:03 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-07 06:41:03 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-07 06:41:04 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-07 06:41:04 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-07 06:41:05 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-07 06:41:05 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-07 06:41:06 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-07 06:41:06 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-07 06:41:06 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-07 06:41:07 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-07 06:41:07 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-07 06:41:08 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-07 06:41:08 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-07 06:41:09 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-07 06:41:09 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-07 06:41:10 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-07 06:41:10 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-07 06:41:11 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-07 06:41:11 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-07 06:41:12 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-07 06:41:12 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-07 06:41:13 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-07 06:41:13 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-07 06:41:14 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-07 06:41:14 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-07 06:41:14 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-07 06:41:15 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-07 06:41:15 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-07 06:41:16 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-07 06:41:16 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-07 06:41:17 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-07 06:41:17 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-07 06:41:18 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-07 06:41:18 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-07 06:41:19 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-07 06:41:19 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-07 06:41:20 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-07 06:41:20 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-07 06:41:21 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-07 06:41:21 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-07 06:41:22 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-07 06:41:22 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-07 06:41:22 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-07 06:41:23 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-07 06:41:23 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-07 06:41:24 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-07 06:41:24 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-07 06:41:25 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-07 06:41:25 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-07 06:41:26 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-07 06:41:26 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-07 06:41:27 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-07 06:41:27 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-07 06:41:28 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-07 06:41:28 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-07 06:41:29 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-07 06:41:29 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-07 06:41:30 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-07 06:41:30 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-07 06:41:30 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-07 06:41:31 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-07 06:41:31 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-07 06:41:32 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-07 06:41:32 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-07 06:41:33 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-07 06:41:33 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-07 06:41:34 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-07 06:41:34 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-07 06:41:35 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-04-07 06:41:35 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-04-07 06:41:36 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-04-07 06:41:36 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-04-07 06:41:37 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-04-07 06:41:37 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-04-07 06:41:38 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-04-07 06:41:38 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-04-07 06:41:38 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-04-07 06:41:39 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-04-07 06:41:39 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-04-07 06:41:40 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-04-07 06:41:40 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-04-07 06:41:41 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-04-07 06:41:41 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-04-07 06:41:42 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-04-07 06:41:42 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-04-07 06:41:43 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-04-07 06:41:43 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-04-07 06:41:44 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-04-07 06:41:44 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-04-07 06:41:45 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-04-07 06:41:45 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-04-07 06:41:46 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-04-07 06:41:46 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-04-07 06:41:46 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-04-07 06:41:47 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-04-07 06:41:47 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-04-07 06:41:48 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-04-07 06:41:48 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-04-07 06:41:49 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-04-07 06:41:49 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-04-07 06:41:50 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-04-07 06:41:50 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-04-07 06:41:51 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-04-07 06:41:51 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-04-07 06:41:52 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-04-07 06:41:52 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-04-07 06:41:53 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-04-07 06:41:53 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-04-07 06:41:54 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-04-07 06:41:54 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-04-07 06:41:54 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-04-07 06:41:55 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-04-07 06:41:55 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-04-07 06:41:56 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-04-07 06:41:56 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-04-07 06:41:57 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-04-07 06:41:57 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-04-07 06:41:58 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-04-07 06:41:58 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-04-07 06:41:59 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-04-07 06:41:59 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-04-07 06:42:00 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-04-07 06:42:00 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-04-07 06:42:01 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-04-07 06:42:01 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-04-07 06:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-04-07 06:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-04-07 06:42:02 [DEBUG] clck_gen.py:128 IND CLOCK 19584
2025-04-07 06:42:03 [DEBUG] clck_gen.py:128 IND CLOCK 19686
2025-04-07 06:42:03 [DEBUG] clck_gen.py:128 IND CLOCK 19788
2025-04-07 06:42:04 [DEBUG] clck_gen.py:128 IND CLOCK 19890
2025-04-07 06:42:04 [DEBUG] clck_gen.py:128 IND CLOCK 19992
2025-04-07 06:42:05 [DEBUG] clck_gen.py:128 IND CLOCK 20094
2025-04-07 06:42:05 [DEBUG] clck_gen.py:128 IND CLOCK 20196
2025-04-07 06:42:06 [DEBUG] clck_gen.py:128 IND CLOCK 20298
2025-04-07 06:42:06 [DEBUG] clck_gen.py:128 IND CLOCK 20400
2025-04-07 06:42:07 [DEBUG] clck_gen.py:128 IND CLOCK 20502
2025-04-07 06:42:07 [DEBUG] clck_gen.py:128 IND CLOCK 20604
2025-04-07 06:42:08 [DEBUG] clck_gen.py:128 IND CLOCK 20706
2025-04-07 06:42:08 [DEBUG] clck_gen.py:128 IND CLOCK 20808
2025-04-07 06:42:09 [DEBUG] clck_gen.py:128 IND CLOCK 20910
2025-04-07 06:42:09 [DEBUG] clck_gen.py:128 IND CLOCK 21012
2025-04-07 06:42:10 [DEBUG] clck_gen.py:128 IND CLOCK 21114
2025-04-07 06:42:10 [DEBUG] clck_gen.py:128 IND CLOCK 21216
2025-04-07 06:42:10 [DEBUG] clck_gen.py:128 IND CLOCK 21318
2025-04-07 06:42:11 [DEBUG] clck_gen.py:128 IND CLOCK 21420
2025-04-07 06:42:11 [DEBUG] clck_gen.py:128 IND CLOCK 21522
2025-04-07 06:42:11 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -429us; resetting the clock
2025-04-07 06:42:12 [DEBUG] clck_gen.py:128 IND CLOCK 21624
2025-04-07 06:42:12 [DEBUG] clck_gen.py:128 IND CLOCK 21726
2025-04-07 06:42:13 [DEBUG] clck_gen.py:128 IND CLOCK 21828
2025-04-07 06:42:13 [DEBUG] clck_gen.py:128 IND CLOCK 21930
2025-04-07 06:42:14 [DEBUG] clck_gen.py:128 IND CLOCK 22032
2025-04-07 06:42:14 [DEBUG] clck_gen.py:128 IND CLOCK 22134
2025-04-07 06:42:15 [DEBUG] clck_gen.py:128 IND CLOCK 22236
2025-04-07 06:42:15 [DEBUG] clck_gen.py:128 IND CLOCK 22338
2025-04-07 06:42:16 [DEBUG] clck_gen.py:128 IND CLOCK 22440
2025-04-07 06:42:16 [DEBUG] clck_gen.py:128 IND CLOCK 22542
2025-04-07 06:42:17 [DEBUG] clck_gen.py:128 IND CLOCK 22644
2025-04-07 06:42:17 [DEBUG] clck_gen.py:128 IND CLOCK 22746
2025-04-07 06:42:18 [DEBUG] clck_gen.py:128 IND CLOCK 22848
2025-04-07 06:42:18 [DEBUG] clck_gen.py:128 IND CLOCK 22950
2025-04-07 06:42:18 [DEBUG] clck_gen.py:128 IND CLOCK 23052
2025-04-07 06:42:19 [DEBUG] clck_gen.py:128 IND CLOCK 23154
2025-04-07 06:42:19 [DEBUG] clck_gen.py:128 IND CLOCK 23256
2025-04-07 06:42:20 [DEBUG] clck_gen.py:128 IND CLOCK 23358
2025-04-07 06:42:20 [DEBUG] clck_gen.py:128 IND CLOCK 23460
2025-04-07 06:42:21 [DEBUG] clck_gen.py:128 IND CLOCK 23562
2025-04-07 06:42:21 [DEBUG] clck_gen.py:128 IND CLOCK 23664
2025-04-07 06:42:22 [DEBUG] clck_gen.py:128 IND CLOCK 23766
2025-04-07 06:42:22 [DEBUG] clck_gen.py:128 IND CLOCK 23868
2025-04-07 06:42:23 [DEBUG] clck_gen.py:128 IND CLOCK 23970
2025-04-07 06:42:23 [DEBUG] clck_gen.py:128 IND CLOCK 24072
2025-04-07 06:42:24 [DEBUG] clck_gen.py:128 IND CLOCK 24174
2025-04-07 06:42:24 [DEBUG] clck_gen.py:128 IND CLOCK 24276
2025-04-07 06:42:25 [DEBUG] clck_gen.py:128 IND CLOCK 24378
2025-04-07 06:42:25 [DEBUG] clck_gen.py:128 IND CLOCK 24480
2025-04-07 06:42:26 [DEBUG] clck_gen.py:128 IND CLOCK 24582
2025-04-07 06:42:26 [DEBUG] clck_gen.py:128 IND CLOCK 24684
2025-04-07 06:42:26 [DEBUG] clck_gen.py:128 IND CLOCK 24786
2025-04-07 06:42:27 [DEBUG] clck_gen.py:128 IND CLOCK 24888
2025-04-07 06:42:27 [DEBUG] clck_gen.py:128 IND CLOCK 24990
2025-04-07 06:42:28 [DEBUG] clck_gen.py:128 IND CLOCK 25092
2025-04-07 06:42:28 [DEBUG] clck_gen.py:128 IND CLOCK 25194
2025-04-07 06:42:29 [DEBUG] clck_gen.py:128 IND CLOCK 25296
2025-04-07 06:42:29 [DEBUG] clck_gen.py:128 IND CLOCK 25398
2025-04-07 06:42:30 [DEBUG] clck_gen.py:128 IND CLOCK 25500
2025-04-07 06:42:30 [DEBUG] clck_gen.py:128 IND CLOCK 25602
2025-04-07 06:42:31 [DEBUG] clck_gen.py:128 IND CLOCK 25704
2025-04-07 06:42:31 [DEBUG] clck_gen.py:128 IND CLOCK 25806
2025-04-07 06:42:32 [DEBUG] clck_gen.py:128 IND CLOCK 25908
2025-04-07 06:42:32 [DEBUG] clck_gen.py:128 IND CLOCK 26010
2025-04-07 06:42:33 [DEBUG] clck_gen.py:128 IND CLOCK 26112
2025-04-07 06:42:33 [DEBUG] clck_gen.py:128 IND CLOCK 26214
2025-04-07 06:42:34 [DEBUG] clck_gen.py:128 IND CLOCK 26316
2025-04-07 06:42:34 [DEBUG] clck_gen.py:128 IND CLOCK 26418
2025-04-07 06:42:34 [DEBUG] clck_gen.py:128 IND CLOCK 26520
2025-04-07 06:42:35 [DEBUG] clck_gen.py:128 IND CLOCK 26622
2025-04-07 06:42:35 [DEBUG] clck_gen.py:128 IND CLOCK 26724
2025-04-07 06:42:36 [DEBUG] clck_gen.py:128 IND CLOCK 26826
2025-04-07 06:42:36 [DEBUG] clck_gen.py:128 IND CLOCK 26928
2025-04-07 06:42:37 [DEBUG] clck_gen.py:128 IND CLOCK 27030
2025-04-07 06:42:37 [DEBUG] clck_gen.py:128 IND CLOCK 27132
2025-04-07 06:42:38 [DEBUG] clck_gen.py:128 IND CLOCK 27234
2025-04-07 06:42:38 [DEBUG] clck_gen.py:128 IND CLOCK 27336
2025-04-07 06:42:39 [DEBUG] clck_gen.py:128 IND CLOCK 27438
2025-04-07 06:42:39 [DEBUG] clck_gen.py:128 IND CLOCK 27540
2025-04-07 06:42:40 [DEBUG] clck_gen.py:128 IND CLOCK 27642
2025-04-07 06:42:40 [DEBUG] clck_gen.py:128 IND CLOCK 27744
2025-04-07 06:42:41 [DEBUG] clck_gen.py:128 IND CLOCK 27846
2025-04-07 06:42:41 [DEBUG] clck_gen.py:128 IND CLOCK 27948
2025-04-07 06:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 28050
2025-04-07 06:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 28152
2025-04-07 06:42:42 [DEBUG] clck_gen.py:128 IND CLOCK 28254
2025-04-07 06:42:43 [DEBUG] clck_gen.py:128 IND CLOCK 28356
2025-04-07 06:42:43 [DEBUG] clck_gen.py:128 IND CLOCK 28458
2025-04-07 06:42:44 [DEBUG] clck_gen.py:128 IND CLOCK 28560
2025-04-07 06:42:44 [DEBUG] clck_gen.py:128 IND CLOCK 28662
2025-04-07 06:42:45 [DEBUG] clck_gen.py:128 IND CLOCK 28764
2025-04-07 06:42:45 [DEBUG] clck_gen.py:128 IND CLOCK 28866
2025-04-07 06:42:46 [DEBUG] clck_gen.py:128 IND CLOCK 28968
2025-04-07 06:42:46 [DEBUG] clck_gen.py:128 IND CLOCK 29070
2025-04-07 06:42:47 [DEBUG] clck_gen.py:128 IND CLOCK 29172
2025-04-07 06:42:47 [DEBUG] clck_gen.py:128 IND CLOCK 29274
2025-04-07 06:42:48 [DEBUG] clck_gen.py:128 IND CLOCK 29376
2025-04-07 06:42:48 [DEBUG] clck_gen.py:128 IND CLOCK 29478
2025-04-07 06:42:49 [DEBUG] clck_gen.py:128 IND CLOCK 29580
2025-04-07 06:42:49 [DEBUG] clck_gen.py:128 IND CLOCK 29682
2025-04-07 06:42:50 [DEBUG] clck_gen.py:128 IND CLOCK 29784
2025-04-07 06:42:50 [DEBUG] clck_gen.py:128 IND CLOCK 29886
2025-04-07 06:42:50 [DEBUG] clck_gen.py:128 IND CLOCK 29988
2025-04-07 06:42:51 [DEBUG] clck_gen.py:128 IND CLOCK 30090
2025-04-07 06:42:51 [DEBUG] clck_gen.py:128 IND CLOCK 30192
2025-04-07 06:42:52 [DEBUG] clck_gen.py:128 IND CLOCK 30294
2025-04-07 06:42:52 [DEBUG] clck_gen.py:128 IND CLOCK 30396
2025-04-07 06:42:53 [DEBUG] clck_gen.py:128 IND CLOCK 30498
2025-04-07 06:42:53 [DEBUG] clck_gen.py:128 IND CLOCK 30600
2025-04-07 06:42:54 [DEBUG] clck_gen.py:128 IND CLOCK 30702
2025-04-07 06:42:54 [DEBUG] clck_gen.py:128 IND CLOCK 30804
2025-04-07 06:42:55 [DEBUG] clck_gen.py:128 IND CLOCK 30906
2025-04-07 06:42:55 [DEBUG] clck_gen.py:128 IND CLOCK 31008
2025-04-07 06:42:56 [DEBUG] clck_gen.py:128 IND CLOCK 31110
2025-04-07 06:42:56 [DEBUG] clck_gen.py:128 IND CLOCK 31212
2025-04-07 06:42:57 [DEBUG] clck_gen.py:128 IND CLOCK 31314
2025-04-07 06:42:57 [DEBUG] clck_gen.py:128 IND CLOCK 31416
2025-04-07 06:42:58 [DEBUG] clck_gen.py:128 IND CLOCK 31518
2025-04-07 06:42:58 [DEBUG] clck_gen.py:128 IND CLOCK 31620
2025-04-07 06:42:58 [DEBUG] clck_gen.py:128 IND CLOCK 31722
2025-04-07 06:42:59 [DEBUG] clck_gen.py:128 IND CLOCK 31824
2025-04-07 06:42:59 [DEBUG] clck_gen.py:128 IND CLOCK 31926
2025-04-07 06:43:00 [DEBUG] clck_gen.py:128 IND CLOCK 32028
2025-04-07 06:43:00 [DEBUG] clck_gen.py:128 IND CLOCK 32130
2025-04-07 06:43:01 [DEBUG] clck_gen.py:128 IND CLOCK 32232
2025-04-07 06:43:01 [DEBUG] clck_gen.py:128 IND CLOCK 32334
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2025-04-07 06:44:23 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -8657us; resetting the clock
2025-04-07 06:44:24 [DEBUG] clck_gen.py:128 IND CLOCK 50184
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2025-04-07 06:47:18 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -6896us; resetting the clock
2025-04-07 06:47:18 [DEBUG] clck_gen.py:128 IND CLOCK 88026
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2025-04-07 06:51:35 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -10751us; resetting the clock
2025-04-07 06:51:35 [DEBUG] clck_gen.py:128 IND CLOCK 143718
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2025-04-07 06:54:53 [DEBUG] clck_gen.py:128 IND CLOCK 186456
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2025-04-07 06:54:58 [DEBUG] clck_gen.py:128 IND CLOCK 187680
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2025-04-07 06:55:08 [DEBUG] clck_gen.py:128 IND CLOCK 189720
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2025-04-07 06:55:13 [DEBUG] clck_gen.py:128 IND CLOCK 190944
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2025-04-07 06:55:26 [DEBUG] clck_gen.py:128 IND CLOCK 193596
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2025-04-07 06:55:27 [DEBUG] clck_gen.py:128 IND CLOCK 193800
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2025-04-07 06:55:27 [DEBUG] clck_gen.py:128 IND CLOCK 194004
2025-04-07 06:55:28 [DEBUG] clck_gen.py:128 IND CLOCK 194106
2025-04-07 06:55:28 [DEBUG] clck_gen.py:128 IND CLOCK 194208
2025-04-07 06:55:29 [DEBUG] clck_gen.py:128 IND CLOCK 194310
2025-04-07 06:55:29 [DEBUG] clck_gen.py:128 IND CLOCK 194412
2025-04-07 06:55:30 [DEBUG] clck_gen.py:128 IND CLOCK 194514
2025-04-07 06:55:30 [DEBUG] clck_gen.py:128 IND CLOCK 194616
2025-04-07 06:55:31 [DEBUG] clck_gen.py:128 IND CLOCK 194718
2025-04-07 06:55:31 [DEBUG] clck_gen.py:128 IND CLOCK 194820
2025-04-07 06:55:32 [DEBUG] clck_gen.py:128 IND CLOCK 194922
2025-04-07 06:55:32 [DEBUG] clck_gen.py:128 IND CLOCK 195024
2025-04-07 06:55:33 [DEBUG] clck_gen.py:128 IND CLOCK 195126
2025-04-07 06:55:33 [DEBUG] clck_gen.py:128 IND CLOCK 195228
2025-04-07 06:55:34 [DEBUG] clck_gen.py:128 IND CLOCK 195330
2025-04-07 06:55:34 [DEBUG] clck_gen.py:128 IND CLOCK 195432
2025-04-07 06:55:35 [DEBUG] clck_gen.py:128 IND CLOCK 195534
2025-04-07 06:55:35 [DEBUG] clck_gen.py:128 IND CLOCK 195636
2025-04-07 06:55:35 [DEBUG] clck_gen.py:128 IND CLOCK 195738
2025-04-07 06:55:36 [DEBUG] clck_gen.py:128 IND CLOCK 195840
2025-04-07 06:55:36 [DEBUG] clck_gen.py:128 IND CLOCK 195942
2025-04-07 06:55:37 [DEBUG] clck_gen.py:128 IND CLOCK 196044
2025-04-07 06:55:37 [DEBUG] clck_gen.py:128 IND CLOCK 196146
2025-04-07 06:55:38 [DEBUG] clck_gen.py:128 IND CLOCK 196248
2025-04-07 06:55:38 [DEBUG] clck_gen.py:128 IND CLOCK 196350
2025-04-07 06:55:39 [DEBUG] clck_gen.py:128 IND CLOCK 196452
2025-04-07 06:55:39 [DEBUG] clck_gen.py:128 IND CLOCK 196554
2025-04-07 06:55:40 [DEBUG] clck_gen.py:128 IND CLOCK 196656
2025-04-07 06:55:40 [DEBUG] clck_gen.py:128 IND CLOCK 196758
2025-04-07 06:55:41 [DEBUG] clck_gen.py:128 IND CLOCK 196860
2025-04-07 06:55:41 [DEBUG] clck_gen.py:128 IND CLOCK 196962
2025-04-07 06:55:42 [DEBUG] clck_gen.py:128 IND CLOCK 197064
2025-04-07 06:55:42 [DEBUG] clck_gen.py:128 IND CLOCK 197166
2025-04-07 06:55:43 [DEBUG] clck_gen.py:128 IND CLOCK 197268
2025-04-07 06:55:43 [DEBUG] clck_gen.py:128 IND CLOCK 197370
2025-04-07 06:55:43 [DEBUG] clck_gen.py:128 IND CLOCK 197472
2025-04-07 06:55:44 [DEBUG] clck_gen.py:128 IND CLOCK 197574
2025-04-07 06:55:44 [DEBUG] clck_gen.py:128 IND CLOCK 197676
2025-04-07 06:55:45 [DEBUG] clck_gen.py:128 IND CLOCK 197778
2025-04-07 06:55:45 [DEBUG] clck_gen.py:128 IND CLOCK 197880
2025-04-07 06:55:46 [DEBUG] clck_gen.py:128 IND CLOCK 197982
2025-04-07 06:55:46 [DEBUG] clck_gen.py:128 IND CLOCK 198084
2025-04-07 06:55:47 [DEBUG] clck_gen.py:128 IND CLOCK 198186
2025-04-07 06:55:47 [DEBUG] clck_gen.py:128 IND CLOCK 198288
2025-04-07 06:55:48 [DEBUG] clck_gen.py:128 IND CLOCK 198390
2025-04-07 06:55:48 [DEBUG] clck_gen.py:128 IND CLOCK 198492
2025-04-07 06:55:49 [DEBUG] clck_gen.py:128 IND CLOCK 198594
2025-04-07 06:55:49 [DEBUG] clck_gen.py:128 IND CLOCK 198696
2025-04-07 06:55:50 [DEBUG] clck_gen.py:128 IND CLOCK 198798
2025-04-07 06:55:50 [DEBUG] clck_gen.py:128 IND CLOCK 198900
2025-04-07 06:55:51 [DEBUG] clck_gen.py:128 IND CLOCK 199002
2025-04-07 06:55:51 [DEBUG] clck_gen.py:128 IND CLOCK 199104
2025-04-07 06:55:51 [DEBUG] clck_gen.py:128 IND CLOCK 199206
2025-04-07 06:55:52 [DEBUG] clck_gen.py:128 IND CLOCK 199308
2025-04-07 06:55:52 [DEBUG] clck_gen.py:128 IND CLOCK 199410
2025-04-07 06:55:53 [DEBUG] clck_gen.py:128 IND CLOCK 199512
2025-04-07 06:55:53 [DEBUG] clck_gen.py:128 IND CLOCK 199614
2025-04-07 06:55:54 [DEBUG] clck_gen.py:128 IND CLOCK 199716
2025-04-07 06:55:54 [DEBUG] clck_gen.py:128 IND CLOCK 199818
2025-04-07 06:55:55 [DEBUG] clck_gen.py:128 IND CLOCK 199920
2025-04-07 06:55:55 [DEBUG] clck_gen.py:128 IND CLOCK 200022
2025-04-07 06:55:56 [DEBUG] clck_gen.py:128 IND CLOCK 200124
2025-04-07 06:55:56 [DEBUG] clck_gen.py:128 IND CLOCK 200226
2025-04-07 06:55:57 [DEBUG] clck_gen.py:128 IND CLOCK 200328
2025-04-07 06:55:57 [DEBUG] clck_gen.py:128 IND CLOCK 200430
2025-04-07 06:55:58 [DEBUG] clck_gen.py:128 IND CLOCK 200532
2025-04-07 06:55:58 [DEBUG] clck_gen.py:128 IND CLOCK 200634
2025-04-07 06:55:59 [DEBUG] clck_gen.py:128 IND CLOCK 200736
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2025-04-07 06:59:56 [DEBUG] clck_gen.py:128 IND CLOCK 252246
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2025-04-07 07:00:17 [DEBUG] clck_gen.py:128 IND CLOCK 256836
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2025-04-07 07:04:07 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -428us; resetting the clock
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2025-04-07 07:04:34 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -2458us; resetting the clock
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2025-04-07 07:04:38 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -2769us; resetting the clock
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2025-04-07 07:15:15 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -3108us; resetting the clock
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